]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
mmc: zynq_sdhci: Fix UHS 1.8v switching with 5ms delay
authorAshok Reddy Soma <ashok.reddy.soma@xilinx.com>
Mon, 30 Nov 2020 15:08:47 +0000 (08:08 -0700)
committerMichal Simek <michal.simek@xilinx.com>
Tue, 2 Feb 2021 12:49:32 +0000 (13:49 +0100)
SD3.0 spec needs 5ms delay after host controller switches to 1.8v.
Remove the clock disable/enable logic from sdhci.c and add 5ms delay.

Return if clock is disabled from set_ios() so that we dont touch
anything else.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
State: pending

drivers/mmc/sdhci.c
drivers/mmc/zynq_sdhci.c

index 06289343124ec913af91e4833a08aec015a4b8e4..f25a9390232d1464125d1868645534576fd0751d 100644 (file)
@@ -528,7 +528,7 @@ static int sdhci_set_ios(struct mmc *mmc)
                sdhci_set_clock(mmc, mmc->clock);
 
        if (mmc->clk_disable)
-               sdhci_set_clock(mmc, 0);
+               return sdhci_set_clock(mmc, 0);
 
        /* Set bus width */
        ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
@@ -553,19 +553,11 @@ static int sdhci_set_ios(struct mmc *mmc)
                no_hispd_bit = true;
        }
 
-       if (!no_hispd_bit) {
-               if (mmc->selected_mode == MMC_HS ||
-                   mmc->selected_mode == SD_HS ||
-                   mmc->selected_mode == MMC_DDR_52 ||
-                   mmc->selected_mode == MMC_HS_200 ||
-                   mmc->selected_mode == MMC_HS_400 ||
-                   mmc->selected_mode == UHS_SDR25 ||
-                   mmc->selected_mode == UHS_SDR50 ||
-                   mmc->selected_mode == UHS_SDR104 ||
-                   mmc->selected_mode == UHS_DDR50)
-                       ctrl |= SDHCI_CTRL_HISPD;
-               else
-                       ctrl &= ~SDHCI_CTRL_HISPD;
+       sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
+
+       if (IS_SD(mmc) && SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
+               if (host->ops && host->ops->set_control_reg)
+                       host->ops->set_control_reg(host);
        }
 
        sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
index 6bcdb4779410ae3be38f9dfc8b28f87d89324e18..442ce5cf1683b10d9c1185fd2d83820d33dd215d 100644 (file)
@@ -534,6 +534,11 @@ static void arasan_sdhci_set_control_reg(struct sdhci_host *host)
                reg = sdhci_readw(host, SDHCI_HOST_CONTROL2);
                reg |= SDHCI_CTRL_VDD_180;
                sdhci_writew(host, reg, SDHCI_HOST_CONTROL2);
+               /*
+                * 5ms delay is required as per SD3.0 spec while switching
+                * voltage to 1.8v
+                */
+               mdelay(5);
        }
 
        if (mmc->selected_mode > SD_HS &&