*
*/
+#include <linux/bitfield.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/ioport.h>
/* PWM registers and bits definitions */
#define PWMCON 0x00
+#define PWMCON_CLKDIV GENMASK(2, 0)
#define PWMHDUR 0x04
#define PWMLDUR 0x08
#define PWMGDUR 0x0c
#define PWMWAVENUM 0x28
#define PWMDWIDTH 0x2c
+#define PWMDWIDTH_PERIOD GENMASK(12, 0)
#define PWM45DWIDTH_FIXUP 0x30
#define PWMTHRES 0x30
#define PWM45THRES_FIXUP 0x34
#define PWM_CK_26M_SEL_V3 0x74
#define PWM_CK_26M_SEL 0x210
-#define PWM_CLK_DIV_MAX 7
-
struct pwm_mediatek_of_data {
unsigned int num_pwms;
bool pwm45_fixup;
if (!cnt_period)
return -EINVAL;
- while (cnt_period > 8192) {
+ while (cnt_period - 1 > FIELD_MAX(PWMDWIDTH_PERIOD)) {
resolution *= 2;
clkdiv++;
cnt_period = DIV_ROUND_CLOSEST_ULL((u64)period_ns * 1000,
resolution);
}
- if (clkdiv > PWM_CLK_DIV_MAX) {
+ if (clkdiv > FIELD_MAX(PWMCON_CLKDIV)) {
dev_err(pwmchip_parent(chip), "period of %d ns not supported\n", period_ns);
ret = -EINVAL;
goto out;