arm: dts: Add i.MX943 EVK board dtsi files

Introduce the base dtsi files for the i.MX943 EVK board. These files
define the essential components such as messaging units, uSDHC, GPIOs
and lpuart for board bring-up.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>

diff --git a/arch/arm/dts/imx943-evk-u-boot.dtsi b/arch/arm/dts/imx943-evk-u-boot.dtsi
new file mode 100644 (file)
index 0000000..5496385
--- /dev/null
+++ b/arch/arm/dts/imx943-evk-u-boot.dtsi
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2025 NXP
+ */
+
+#include "imx943-u-boot.dtsi"
+
+&lpuart1 {
+       bootph-pre-ram;
+};
+
+&reg_usdhc2_vmmc {
+       bootph-pre-ram;
+};
+
+&usdhc1 {
+       bootph-pre-ram;
+};
+
+&usdhc2 {
+       bootph-pre-ram;
+};
+
+&wdog3 {
+       status = "disabled";
+};
+
+&pinctrl_reg_usdhc2_vmmc {
+       bootph-pre-ram;
+};
+
+&pinctrl_uart1 {
+       bootph-pre-ram;
+};
+
+&pinctrl_usdhc1 {
+       bootph-pre-ram;
+};
+
+&pinctrl_usdhc1_100mhz {
+       bootph-pre-ram;
+};
+
+&pinctrl_usdhc1_200mhz {
+       bootph-pre-ram;
+};
+
+&pinctrl_usdhc2 {
+       bootph-pre-ram;
+};
+
+&pinctrl_usdhc2_100mhz {
+       bootph-pre-ram;
+};
+
+&pinctrl_usdhc2_200mhz {
+       bootph-pre-ram;
+};
+
+&pinctrl_usdhc2_gpio {
+       bootph-pre-ram;
+};

diff --git a/arch/arm/dts/imx943-u-boot.dtsi b/arch/arm/dts/imx943-u-boot.dtsi
new file mode 100644 (file)
index 0000000..9c4882f
--- /dev/null
+++ b/arch/arm/dts/imx943-u-boot.dtsi
@@ -0,0 +1,212 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2025 NXP
+ */
+
+/ {
+       binman {
+               multiple-images;
+
+               m33-oei-ddrfw {
+                       pad-byte = <0x00>;
+                       align-size = <0x8>;
+                       filename = "m33-oei-ddrfw.bin";
+
+                       oei-m33-ddr {
+                               align-size = <0x4>;
+                               filename = "oei-m33-ddr.bin";
+                               type = "blob-ext";
+                       };
+
+                       imx-lpddr {
+                               type = "nxp-header-ddrfw";
+
+                               imx-lpddr-imem {
+                                       filename = "lpddr5_imem_v202409.bin";
+                                       type = "blob-ext";
+                               };
+
+                               imx-lpddr-dmem {
+                                       filename = "lpddr5_dmem_v202409.bin";
+                                       type = "blob-ext";
+                               };
+                       };
+
+                       imx-lpddr-qb {
+                               type = "nxp-header-ddrfw";
+
+                               imx-lpddr-imem-qb {
+                                       filename = "lpddr5_imem_qb_v202409.bin";
+                                       type = "blob-ext";
+                               };
+
+                               imx-lpddr-dmem-qb {
+                                       filename = "lpddr5_dmem_qb_v202409.bin";
+                                       type = "blob-ext";
+                               };
+                       };
+               };
+
+               imx-boot {
+                       filename = "flash.bin";
+                       pad-byte = <0x00>;
+
+                       spl {
+                               type = "nxp-imx9image";
+                               cfg-path = "spl/u-boot-spl.cfgout";
+                               args;
+
+                               cntr-version = <2>;
+                               boot-from = "sd";
+                               soc-type = "IMX9";
+                               append = "mx943a0-ahab-container.img";
+                               container;
+                               dummy-ddr;
+                               image0 = "oei", "m33-oei-ddrfw.bin", "0x1ffc0000";
+                               hold = <0x10000>;
+                               image1 = "m33", "m33_image.bin", "0x1ffc0000";
+                               image2 = "a55", "spl/u-boot-spl.bin", "0x20480000";
+                               dummy-v2x = <0x8b000000>;
+                       };
+
+                       u-boot {
+                               type = "nxp-imx9image";
+                               cfg-path = "u-boot-container.cfgout";
+                               args;
+
+                               cntr-version = <2>;
+                               boot-from = "sd";
+                               soc-type = "IMX9";
+                               container;
+                               image0 = "a55", "bl31.bin", "0x8a200000";
+                               image1 = "a55", "u-boot.bin", "0x90200000";
+                       };
+               };
+       };
+};
+
+&cpu0 {
+       clocks = <&scmi_clk IMX94_CLK_ARMPLL_PFD0>;
+       /delete-property/ power-domains;
+};
+
+&cpu1 {
+       clocks = <&scmi_clk IMX94_CLK_ARMPLL_PFD0>;
+       /delete-property/ power-domains;
+};
+
+&cpu2 {
+       clocks = <&scmi_clk IMX94_CLK_ARMPLL_PFD0>;
+       /delete-property/ power-domains;
+};
+
+&cpu3 {
+       clocks = <&scmi_clk IMX94_CLK_ARMPLL_PFD0>;
+       /delete-property/ power-domains;
+};
+
+&aips1 {
+       bootph-all;
+};
+
+&aips2 {
+       bootph-all;
+};
+
+&aips3 {
+       bootph-all;
+};
+
+&clk_ext1 {
+       bootph-all;
+};
+
+&dummy {
+       bootph-all;
+};
+
+&{/firmware} {
+       bootph-all;
+};
+
+&{/firmware/scmi} {
+       bootph-all;
+};
+
+&{/firmware/scmi/protocol@11} {
+       bootph-all;
+};
+
+&{/firmware/scmi/protocol@13} {
+       bootph-all;
+};
+
+&{/firmware/scmi/protocol@14} {
+       bootph-all;
+};
+
+&{/firmware/scmi/protocol@19} {
+       bootph-all;
+};
+
+&gpio2 {
+       bootph-pre-ram;
+};
+
+&gpio3 {
+       bootph-pre-ram;
+};
+
+&gpio4 {
+       bootph-pre-ram;
+};
+
+&gpio5 {
+       bootph-pre-ram;
+};
+
+&gpio6 {
+       bootph-pre-ram;
+};
+
+&gpio7 {
+       bootph-pre-ram;
+};
+
+&mu2 {
+       bootph-all;
+};
+
+&osc_24m {
+       bootph-all;
+};
+
+&scmi_buf0 {
+       bootph-all;
+};
+
+&scmi_buf1 {
+       bootph-all;
+};
+
+&{/soc} {
+       bootph-all;
+
+       elemu1: mailbox@47530000 {
+               compatible = "fsl,imx93-mu-s4";
+               reg = <0x0 0x47530000 0x0 0x10000>;
+               bootph-all;
+               status = "okay";
+       };
+
+       elemu3: mailbox@47550000 {
+               compatible = "fsl,imx93-mu-s4";
+               reg = <0x0 0x47550000 0x0 0x10000>;
+               bootph-all;
+               status = "okay";
+       };
+};
+
+&sram0 {
+       bootph-all;
+};