drm/i915/color: Do not pre-load LUTs with DB registers

Since Double Buffered LUT registers can be written in active region
no need to preload them.

Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Link: https://lore.kernel.org/r/20250523062041.166468-11-chaitanya.kumar.borah@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index ac00b86798fb5deaccfa1686835e0cb0d98c89a3..671db6926e4c89310eb2d64abea914b1d7f93eac 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -2041,9 +2041,13 @@ void intel_color_wait_commit(const struct intel_crtc_state *crtc_state)
 static bool intel_can_preload_luts(struct intel_atomic_state *state,
                                   struct intel_crtc *crtc)
 {
+       struct intel_display *display = to_intel_display(state);
        const struct intel_crtc_state *old_crtc_state =
                intel_atomic_get_old_crtc_state(state, crtc);
 
+       if (HAS_DOUBLE_BUFFERED_LUT(display))
+               return false;
+
        return !old_crtc_state->post_csc_lut &&
                !old_crtc_state->pre_csc_lut;
 }