habanalabs: halt debug engines on user process close

This patch fix a potential bug where a user's process has closed
unexpectedly without disabling the debug engines. In that case, the debug
engines might continue running but because the user's MMU mappings are
going away, we will get page fault errors.

This behavior is also opposed to the general rule where nothing runs on
the device after the user process closes.

The patch stops the debug H/W engines upon process termination and thus
makes sure nothing runs on the device after the process goes away.

Signed-off-by: Omer Shpigelman <oshpigelman@habana.ai>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>

diff --git a/drivers/misc/habanalabs/context.c b/drivers/misc/habanalabs/context.c
index 4804cdcf4c482767a294f734a7a702f7a1d52984..f4c92f110a721d045ecfdfa24bda5c0bc01ce8df 100644 (file)
--- a/drivers/misc/habanalabs/context.c
+++ b/drivers/misc/habanalabs/context.c
@@ -26,6 +26,12 @@ static void hl_ctx_fini(struct hl_ctx *ctx)
                dma_fence_put(ctx->cs_pending[i]);
 
        if (ctx->asid != HL_KERNEL_ASID_ID) {
+               /*
+                * The engines are stopped as there is no executing CS, but the
+                * Coresight might be still working by accessing addresses
+                * related to the stopped engines. Hence stop it explicitly.
+                */
+               hdev->asic_funcs->halt_coresight(hdev);
                hl_vm_ctx_fini(ctx);
                hl_asid_free(hdev, ctx->asid);
        }

diff --git a/drivers/misc/habanalabs/goya/goya.c b/drivers/misc/habanalabs/goya/goya.c
index a582e29c1ee4a7527539ec73a89c5a940ae5c9f7..02d116b01a1a25a84696fba053fc5095533f4731 100644 (file)
--- a/drivers/misc/habanalabs/goya/goya.c
+++ b/drivers/misc/habanalabs/goya/goya.c
@@ -4819,7 +4819,8 @@ static const struct hl_asic_funcs goya_funcs = {
        .set_dram_bar_base = goya_set_ddr_bar_base,
        .init_iatu = goya_init_iatu,
        .rreg = hl_rreg,
-       .wreg = hl_wreg
+       .wreg = hl_wreg,
+       .halt_coresight = goya_halt_coresight
 };
 
 /*

diff --git a/drivers/misc/habanalabs/goya/goyaP.h b/drivers/misc/habanalabs/goya/goyaP.h
index 14e216cb366822b699ef2984df9a79cfbc94c777..c83cab0d641e2df257705ac12d7ade7b454e5526 100644 (file)
--- a/drivers/misc/habanalabs/goya/goyaP.h
+++ b/drivers/misc/habanalabs/goya/goyaP.h
@@ -202,6 +202,7 @@ void goya_add_device_attr(struct hl_device *hdev,
                        struct attribute_group *dev_attr_grp);
 int goya_armcp_info_get(struct hl_device *hdev);
 int goya_debug_coresight(struct hl_device *hdev, void *data);
+void goya_halt_coresight(struct hl_device *hdev);
 
 void goya_mmu_prepare(struct hl_device *hdev, u32 asid);
 int goya_mmu_clear_pgt_range(struct hl_device *hdev);

diff --git a/drivers/misc/habanalabs/goya/goya_coresight.c b/drivers/misc/habanalabs/goya/goya_coresight.c
index 1ac951f52d1ebe77322b95e338efb60e8ec17fa0..39f62ce72660922128e54ec084fcefd59d9bb697 100644 (file)
--- a/drivers/misc/habanalabs/goya/goya_coresight.c
+++ b/drivers/misc/habanalabs/goya/goya_coresight.c
@@ -626,3 +626,20 @@ int goya_debug_coresight(struct hl_device *hdev, void *data)
 
        return rc;
 }
+
+void goya_halt_coresight(struct hl_device *hdev)
+{
+       struct hl_debug_params params = {};
+       int i, rc;
+
+       for (i = GOYA_ETF_FIRST ; i <= GOYA_ETF_LAST ; i++) {
+               params.reg_idx = i;
+               rc = goya_config_etf(hdev, &params);
+               if (rc)
+                       dev_err(hdev->dev, "halt ETF failed, %d/%d\n", rc, i);
+       }
+
+       rc = goya_config_etr(hdev, &params);
+       if (rc)
+               dev_err(hdev->dev, "halt ETR failed, %d\n", rc);
+}

diff --git a/drivers/misc/habanalabs/habanalabs.h b/drivers/misc/habanalabs/habanalabs.h
index 71243b3199204c9f0bbe387fe8d8fddff929dfdc..adef7d9d7488ac47a3068e8e254c446becf89e36 100644 (file)
--- a/drivers/misc/habanalabs/habanalabs.h
+++ b/drivers/misc/habanalabs/habanalabs.h
@@ -501,6 +501,7 @@ enum hl_pll_frequency {
  * @init_iatu: Initialize the iATU unit inside the PCI controller.
  * @rreg: Read a register. Needed for simulator support.
  * @wreg: Write a register. Needed for simulator support.
+ * @halt_coresight: stop the ETF and ETR traces.
  */
 struct hl_asic_funcs {
        int (*early_init)(struct hl_device *hdev);
@@ -578,6 +579,7 @@ struct hl_asic_funcs {
        int (*init_iatu)(struct hl_device *hdev);
        u32 (*rreg)(struct hl_device *hdev, u32 reg);
        void (*wreg)(struct hl_device *hdev, u32 reg, u32 val);
+       void (*halt_coresight)(struct hl_device *hdev);
 };