--- /dev/null
+From alexdeucher@gmail.com Sun May 1 15:58:01 2016
+From: Grigori Goronzy <greg@chown.ath.cx>
+Date: Tue, 22 Mar 2016 15:48:18 -0400
+Subject: drm/amdgpu: fix regression on CIK (v2)
+To: gregkh@linuxfoundation.org
+Cc: christian.koenig@amd.com, greg@chown.ath.cx, stable@vger.kernel.org, Alex Deucher <alexander.deucher@amd.com>
+Message-ID: <1458676098-9543-1-git-send-email-alexander.deucher@amd.com>
+
+From: Grigori Goronzy <greg@chown.ath.cx>
+
+This fix was written against drm-next, but when it was
+backported to 4.5 as a stable fix, the driver internal
+structure change was missed. Fix that up here to avoid
+a hang due to waiting for the wrong sequence number.
+
+v2: agd: fix up commit message
+
+Signed-off-by: Grigori Goronzy <greg@chown.ath.cx>
+Cc: stable@vger.kernel.org
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+
+---
+ drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+@@ -3628,7 +3628,7 @@ static void gfx_v7_0_ring_emit_vm_flush(
+ unsigned vm_id, uint64_t pd_addr)
+ {
+ int usepfp = (ring->type == AMDGPU_RING_TYPE_GFX);
+- uint32_t seq = ring->fence_drv.sync_seq;
++ uint32_t seq = ring->fence_drv.sync_seq[ring->idx];
+ uint64_t addr = ring->fence_drv.gpu_addr;
+
+ amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));