hw/pci: Constify all Property

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index bf0a1840dbe5abc5f425cc19d695b4886595180d..90248481b182773cdf5bd60e7751a4ad82df1b54 100644 (file)
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -81,7 +81,7 @@ static const PropertyInfo prop_pci_busnr = {
     .get = prop_pci_busnr_get,
 };
 
-static Property pci_props[] = {
+static const Property pci_props[] = {
     DEFINE_PROP_PCI_DEVFN("addr", PCIDevice, devfn, -1),
     DEFINE_PROP_STRING("romfile", PCIDevice, romfile),
     DEFINE_PROP_UINT32("romsize", PCIDevice, romsize, UINT32_MAX),

diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c
index 2c7bb1a5254ee72b8e3a7d356a7a9c6ed3f41318..dd4fd3674f5f20016aa239409df74f72c354dec4 100644 (file)
--- a/hw/pci/pci_bridge.c
+++ b/hw/pci/pci_bridge.c
@@ -477,7 +477,7 @@ int pci_bridge_qemu_reserve_cap_init(PCIDevice *dev, int cap_offset,
     return 0;
 }
 
-static Property pci_bridge_properties[] = {
+static const Property pci_bridge_properties[] = {
     DEFINE_PROP_BOOL("x-pci-express-writeable-slt-bug", PCIBridge,
                      pcie_writeable_slt_bug, false),
     DEFINE_PROP_END_OF_LIST(),

diff --git a/hw/pci/pci_host.c b/hw/pci/pci_host.c
index dfe6fe618401e2b80a2ac69931d7d821bac0b6e0..321e7be709cc9eaec7deefa5facdd5fa76a10290 100644 (file)
--- a/hw/pci/pci_host.c
+++ b/hw/pci/pci_host.c
@@ -240,7 +240,7 @@ const VMStateDescription vmstate_pcihost = {
     }
 };
 
-static Property pci_host_properties_common[] = {
+static const Property pci_host_properties_common[] = {
     DEFINE_PROP_BOOL("x-config-reg-migration-enabled", PCIHostState,
                      mig_enabled, true),
     DEFINE_PROP_BOOL(PCI_HOST_BYPASS_IOMMU, PCIHostState, bypass_iommu, false),

diff --git a/hw/pci/pcie_port.c b/hw/pci/pcie_port.c
index 9f978ba16485007a9aab0020a7d9015207716405..bac2822e988447034ff036501cafcba838a14001 100644 (file)
--- a/hw/pci/pcie_port.c
+++ b/hw/pci/pcie_port.c
@@ -111,7 +111,7 @@ void pcie_chassis_del_slot(PCIESlot *s)
     QLIST_REMOVE(s, next);
 }
 
-static Property pcie_port_props[] = {
+static const Property pcie_port_props[] = {
     DEFINE_PROP_UINT8("port", PCIEPort, port, 0),
     DEFINE_PROP_UINT16("aer_log_max", PCIEPort,
                        parent_obj.parent_obj.exp.aer_log.log_max,
@@ -204,7 +204,7 @@ static const TypeInfo pcie_port_type_info = {
     .class_init = pcie_port_class_init,
 };
 
-static Property pcie_slot_props[] = {
+static const Property pcie_slot_props[] = {
     DEFINE_PROP_UINT8("chassis", PCIESlot, chassis, 0),
     DEFINE_PROP_UINT16("slot", PCIESlot, slot, 0),
     DEFINE_PROP_BOOL("hotplug", PCIESlot, hotplug, true),