dt-bindings: clock: renesas,r9a09g077/87: Add USB_CLK clock ID

Add the USB clock (USB_CLK) definition for the Renesas RZ/T2H
(R9A09G077) and RZ/N2H (R9A09G087) SoCs.  USB_CLK is used as the
reference clock for USB PHY layer.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250804202643.3967484-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h b/include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h
index 7ecc4f0b235aac301a3bdd24563e3d83b6b1d698..0c2ce81a8744878f69ad75f9abad2dbeb37d020f 100644 (file)
--- a/include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h
+++ b/include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h
@@ -25,5 +25,6 @@
 #define R9A09G077_CLK_PCLKM            13
 #define R9A09G077_CLK_PCLKL            14
 #define R9A09G077_SDHI_CLKHS           15
+#define R9A09G077_USB_CLK              16
 
 #endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G077_CPG_H__ */

diff --git a/include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h b/include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h
index 925e57703925ddc8152147cb74da9478b7ace585..70ee883f2386b4290b6d2623d80f8a17bf3c72ce 100644 (file)
--- a/include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h
+++ b/include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h
@@ -25,5 +25,6 @@
 #define R9A09G087_CLK_PCLKM            13
 #define R9A09G087_CLK_PCLKL            14
 #define R9A09G087_SDHI_CLKHS           15
+#define R9A09G087_USB_CLK              16
 
 #endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G087_CPG_H__ */