drm/xe: Fix PVC RPe and RPa information

A simple lazy buggy copy and paste of the PVC comment has brought
the attention to the incorrect masks of the PVC register for RPa
and RPe. So, let's fix them all.

Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Reviewed-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250109195219.658557-1-rodrigo.vivi@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

diff --git a/drivers/gpu/drm/xe/xe_guc_pc.c b/drivers/gpu/drm/xe/xe_guc_pc.c
index 43f9617baba2903be62c5fe320836dd30b6b274a..02409eedb91438dca98a0f5b5af4a11658167cad 100644 (file)
--- a/drivers/gpu/drm/xe/xe_guc_pc.c
+++ b/drivers/gpu/drm/xe/xe_guc_pc.c
@@ -363,16 +363,17 @@ static void tgl_update_rpa_value(struct xe_guc_pc *pc)
        u32 reg;
 
        /*
-        * For PVC we still need to use fused RP1 as the approximation for RPe
-        * For other platforms than PVC we get the resolved RPe directly from
+        * For PVC we still need to use fused RP0 as the approximation for RPa
+        * For other platforms than PVC we get the resolved RPa directly from
         * PCODE at a different register
         */
-       if (xe->info.platform == XE_PVC)
+       if (xe->info.platform == XE_PVC) {
                reg = xe_mmio_read32(&gt->mmio, PVC_RP_STATE_CAP);
-       else
+               pc->rpa_freq = REG_FIELD_GET(RP0_MASK, reg) * GT_FREQUENCY_MULTIPLIER;
+       } else {
                reg = xe_mmio_read32(&gt->mmio, FREQ_INFO_REC);
-
-       pc->rpa_freq = REG_FIELD_GET(RPA_MASK, reg) * GT_FREQUENCY_MULTIPLIER;
+               pc->rpa_freq = REG_FIELD_GET(RPA_MASK, reg) * GT_FREQUENCY_MULTIPLIER;
+       }
 }
 
 static void tgl_update_rpe_value(struct xe_guc_pc *pc)
@@ -386,12 +387,13 @@ static void tgl_update_rpe_value(struct xe_guc_pc *pc)
         * For other platforms than PVC we get the resolved RPe directly from
         * PCODE at a different register
         */
-       if (xe->info.platform == XE_PVC)
+       if (xe->info.platform == XE_PVC) {
                reg = xe_mmio_read32(&gt->mmio, PVC_RP_STATE_CAP);
-       else
+               pc->rpe_freq = REG_FIELD_GET(RP1_MASK, reg) * GT_FREQUENCY_MULTIPLIER;
+       } else {
                reg = xe_mmio_read32(&gt->mmio, FREQ_INFO_REC);
-
-       pc->rpe_freq = REG_FIELD_GET(RPE_MASK, reg) * GT_FREQUENCY_MULTIPLIER;
+               pc->rpe_freq = REG_FIELD_GET(RPE_MASK, reg) * GT_FREQUENCY_MULTIPLIER;
+       }
 }
 
 static void pc_update_rp_values(struct xe_guc_pc *pc)