perf/x86/intel/uncore: Split the Ice Lake and Tiger Lake MSR uncore support

Previously, the MSR uncore for the Ice Lake and Tiger Lake are
identical. The code path is shared. However, with recent update, the
global MSR_UNC_PERF_GLOBAL_CTRL register and ARB uncore unit are changed
for the Ice Lake. Split the Ice Lake and Tiger Lake MSR uncore support.

The changes only impact the MSR ops() and the ARB uncore unit. Other
codes can still be shared between the Ice Lake and the Tiger Lake.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20200925134905.8839-1-kan.liang@linux.intel.com

diff --git a/arch/x86/events/intel/uncore.c b/arch/x86/events/intel/uncore.c
index ce0a5baaf72aad6b7e36fa128b8bfcf75cc5cca8..86d012b3e0b42ae316e407b55a3e332f1a2f7de3 100644 (file)
--- a/arch/x86/events/intel/uncore.c
+++ b/arch/x86/events/intel/uncore.c
@@ -1627,12 +1627,12 @@ static const struct intel_uncore_init_fun icl_uncore_init __initconst = {
 };
 
 static const struct intel_uncore_init_fun tgl_uncore_init __initconst = {
-       .cpu_init = icl_uncore_cpu_init,
+       .cpu_init = tgl_uncore_cpu_init,
        .mmio_init = tgl_uncore_mmio_init,
 };
 
 static const struct intel_uncore_init_fun tgl_l_uncore_init __initconst = {
-       .cpu_init = icl_uncore_cpu_init,
+       .cpu_init = tgl_uncore_cpu_init,
        .mmio_init = tgl_l_uncore_mmio_init,
 };
 

diff --git a/arch/x86/events/intel/uncore.h b/arch/x86/events/intel/uncore.h
index df544bc377ee9247e15a508f363e9d7aef87ad66..83d2a7d490e038e8c3c068adeadbb3eb91c7f347 100644 (file)
--- a/arch/x86/events/intel/uncore.h
+++ b/arch/x86/events/intel/uncore.h
@@ -568,6 +568,7 @@ void snb_uncore_cpu_init(void);
 void nhm_uncore_cpu_init(void);
 void skl_uncore_cpu_init(void);
 void icl_uncore_cpu_init(void);
+void tgl_uncore_cpu_init(void);
 void tgl_uncore_mmio_init(void);
 void tgl_l_uncore_mmio_init(void);
 int snb_pci2phy_map_init(int devid);

diff --git a/arch/x86/events/intel/uncore_snb.c b/arch/x86/events/intel/uncore_snb.c
index cb94ba86efd28f5ef1e69bcd4ac0976f29e17965..d2d43b6d6946b93bcecd8512b2002f24b3e4593d 100644 (file)
--- a/arch/x86/events/intel/uncore_snb.c
+++ b/arch/x86/events/intel/uncore_snb.c
@@ -377,6 +377,22 @@ void icl_uncore_cpu_init(void)
        snb_uncore_arb.ops = &skl_uncore_msr_ops;
 }
 
+static struct intel_uncore_type *tgl_msr_uncores[] = {
+       &icl_uncore_cbox,
+       &snb_uncore_arb,
+       &icl_uncore_clockbox,
+       NULL,
+};
+
+void tgl_uncore_cpu_init(void)
+{
+       uncore_msr_uncores = tgl_msr_uncores;
+       icl_uncore_cbox.num_boxes = icl_get_cbox_num();
+       icl_uncore_cbox.ops = &skl_uncore_msr_ops;
+       icl_uncore_clockbox.ops = &skl_uncore_msr_ops;
+       snb_uncore_arb.ops = &skl_uncore_msr_ops;
+}
+
 enum {
        SNB_PCI_UNCORE_IMC,
 };