* config/arm/arm.opt (mwords-little-endian): Delete.
* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Remove handling
of TARGET_LITTLE_WORDS.
(WORDS_BIG_ENDIAN): Define to BYTES_BIG_ENDIAN.
* config/arm/arm.c (arm_option_override): Remove TARGET_LITTLE_WORDS
warning.
* doc/invoke.texi: Remove references to -mwords-little-endian.
From-SVN: r212326
+2014-07-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/arm/arm.opt (mwords-little-endian): Delete.
+ * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Remove handling
+ of TARGET_LITTLE_WORDS.
+ (WORDS_BIG_ENDIAN): Define to BYTES_BIG_ENDIAN.
+ * config/arm/arm.c (arm_option_override): Remove TARGET_LITTLE_WORDS
+ warning.
+ * doc/invoke.texi: Remove references to -mwords-little-endian.
+
2014-07-07 Jakub Jelinek <jakub@redhat.com>
* expmed.c (struct init_expmed_rtl): Change all fields but
if (TARGET_APCS_FLOAT)
warning (0, "passing floating point arguments in fp regs not yet supported");
- if (TARGET_LITTLE_WORDS)
- warning (OPT_Wdeprecated, "%<mwords-little-endian%> is deprecated and "
- "will be removed in a future release");
-
/* Initialize boolean versions of the flags, for use in the arm.md file. */
arm_arch3m = (insn_flags & FL_ARCH3M) != 0;
arm_arch4 = (insn_flags & FL_ARCH4) != 0;
builtin_define ("__ARM_BIG_ENDIAN"); \
if (TARGET_THUMB) \
builtin_define ("__THUMBEB__"); \
- if (TARGET_LITTLE_WORDS) \
- builtin_define ("__ARMWEL__"); \
} \
else \
{ \
#define BYTES_BIG_ENDIAN (TARGET_BIG_END != 0)
/* Define this if most significant word of a multiword number is the lowest
- numbered.
- This is always false, even when in big-endian mode. */
-#define WORDS_BIG_ENDIAN (BYTES_BIG_ENDIAN && ! TARGET_LITTLE_WORDS)
+ numbered. */
+#define WORDS_BIG_ENDIAN (BYTES_BIG_ENDIAN)
#define UNITS_PER_WORD 4
EnumValue
Enum(processor_type) String(native) Value(-1) DriverOnly
-mwords-little-endian
-Target Report RejectNegative Mask(LITTLE_WORDS)
-Assume big endian bytes, little endian words. This option is deprecated.
-
mvectorize-with-neon-quad
Target Report RejectNegative InverseMask(NEON_VECTORIZE_DOUBLE)
Use Neon quad-word (rather than double-word) registers for vectorization
-mapcs-float -mno-apcs-float @gol
-mapcs-reentrant -mno-apcs-reentrant @gol
-msched-prolog -mno-sched-prolog @gol
--mlittle-endian -mbig-endian -mwords-little-endian @gol
+-mlittle-endian -mbig-endian @gol
-mfloat-abi=@var{name} @gol
-mfp16-format=@var{name}
-mthumb-interwork -mno-thumb-interwork @gol
Generate code for a processor running in big-endian mode; the default is
to compile code for a little-endian processor.
-@item -mwords-little-endian
-@opindex mwords-little-endian
-This option only applies when generating code for big-endian processors.
-Generate code for a little-endian word order but a big-endian byte
-order. That is, a byte order of the form @samp{32107654}. Note: this
-option should only be used if you require compatibility with code for
-big-endian ARM processors generated by versions of the compiler prior to
-2.8. This option is now deprecated.
-
@item -march=@var{name}
@opindex march
This specifies the name of the target ARM architecture. GCC uses this