x86/cpu: Simplify TLB entry count storage

Commit:

  e0ba94f14f74 ("x86/tlb_info: get last level TLB entry number of CPU")

introduced u16 "info" arrays for each TLB type.

Since 2012 and each array stores just one type of information: the
number of TLB entries for its respective TLB type.

Replace such arrays with simple variables.

Signed-off-by: Ahmed S. Darwish <darwi@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Link: https://lore.kernel.org/r/20250304085152.51092-8-darwi@linutronix.de

diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index c0cd10182e90c12eed155cbdf4ec1d72b76409ab..0ea227fa027c51e64de125733338fe39056d169e 100644 (file)
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -60,18 +60,13 @@ struct vm86;
 # define ARCH_MIN_MMSTRUCT_ALIGN       0
 #endif
 
-enum tlb_infos {
-       ENTRIES,
-       NR_INFO
-};
-
-extern u16 __read_mostly tlb_lli_4k[NR_INFO];
-extern u16 __read_mostly tlb_lli_2m[NR_INFO];
-extern u16 __read_mostly tlb_lli_4m[NR_INFO];
-extern u16 __read_mostly tlb_lld_4k[NR_INFO];
-extern u16 __read_mostly tlb_lld_2m[NR_INFO];
-extern u16 __read_mostly tlb_lld_4m[NR_INFO];
-extern u16 __read_mostly tlb_lld_1g[NR_INFO];
+extern u16 __read_mostly tlb_lli_4k;
+extern u16 __read_mostly tlb_lli_2m;
+extern u16 __read_mostly tlb_lli_4m;
+extern u16 __read_mostly tlb_lld_4k;
+extern u16 __read_mostly tlb_lld_2m;
+extern u16 __read_mostly tlb_lld_4m;
+extern u16 __read_mostly tlb_lld_1g;
 
 /*
  * CPU type and hardware bug flags. Kept separately for each CPU.

diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index d747515ad01308dc7896921c2ce08e7ae0a53556..31576644020119429a8378e6df8f840e17b237c7 100644 (file)
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -1105,8 +1105,8 @@ static void cpu_detect_tlb_amd(struct cpuinfo_x86 *c)
 
        cpuid(0x80000006, &eax, &ebx, &ecx, &edx);
 
-       tlb_lld_4k[ENTRIES] = (ebx >> 16) & mask;
-       tlb_lli_4k[ENTRIES] = ebx & mask;
+       tlb_lld_4k = (ebx >> 16) & mask;
+       tlb_lli_4k = ebx & mask;
 
        /*
         * K8 doesn't have 2M/4M entries in the L2 TLB so read out the L1 TLB
@@ -1119,26 +1119,26 @@ static void cpu_detect_tlb_amd(struct cpuinfo_x86 *c)
 
        /* Handle DTLB 2M and 4M sizes, fall back to L1 if L2 is disabled */
        if (!((eax >> 16) & mask))
-               tlb_lld_2m[ENTRIES] = (cpuid_eax(0x80000005) >> 16) & 0xff;
+               tlb_lld_2m = (cpuid_eax(0x80000005) >> 16) & 0xff;
        else
-               tlb_lld_2m[ENTRIES] = (eax >> 16) & mask;
+               tlb_lld_2m = (eax >> 16) & mask;
 
        /* a 4M entry uses two 2M entries */
-       tlb_lld_4m[ENTRIES] = tlb_lld_2m[ENTRIES] >> 1;
+       tlb_lld_4m = tlb_lld_2m >> 1;
 
        /* Handle ITLB 2M and 4M sizes, fall back to L1 if L2 is disabled */
        if (!(eax & mask)) {
                /* Erratum 658 */
                if (c->x86 == 0x15 && c->x86_model <= 0x1f) {
-                       tlb_lli_2m[ENTRIES] = 1024;
+                       tlb_lli_2m = 1024;
                } else {
                        cpuid(0x80000005, &eax, &ebx, &ecx, &edx);
-                       tlb_lli_2m[ENTRIES] = eax & 0xff;
+                       tlb_lli_2m = eax & 0xff;
                }
        } else
-               tlb_lli_2m[ENTRIES] = eax & mask;
+               tlb_lli_2m = eax & mask;
 
-       tlb_lli_4m[ENTRIES] = tlb_lli_2m[ENTRIES] >> 1;
+       tlb_lli_4m = tlb_lli_2m >> 1;
 }
 
 static const struct cpu_dev amd_cpu_dev = {

diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 8eba9ca9c216127ce1a6d630e7f67130520137b4..3a1a957e0c60e6a7b7f899147b71822aed8b9b78 100644 (file)
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -846,13 +846,13 @@ void cpu_detect_cache_sizes(struct cpuinfo_x86 *c)
        c->x86_cache_size = l2size;
 }
 
-u16 __read_mostly tlb_lli_4k[NR_INFO];
-u16 __read_mostly tlb_lli_2m[NR_INFO];
-u16 __read_mostly tlb_lli_4m[NR_INFO];
-u16 __read_mostly tlb_lld_4k[NR_INFO];
-u16 __read_mostly tlb_lld_2m[NR_INFO];
-u16 __read_mostly tlb_lld_4m[NR_INFO];
-u16 __read_mostly tlb_lld_1g[NR_INFO];
+u16 __read_mostly tlb_lli_4k;
+u16 __read_mostly tlb_lli_2m;
+u16 __read_mostly tlb_lli_4m;
+u16 __read_mostly tlb_lld_4k;
+u16 __read_mostly tlb_lld_2m;
+u16 __read_mostly tlb_lld_4m;
+u16 __read_mostly tlb_lld_1g;
 
 static void cpu_detect_tlb(struct cpuinfo_x86 *c)
 {
@@ -860,12 +860,10 @@ static void cpu_detect_tlb(struct cpuinfo_x86 *c)
                this_cpu->c_detect_tlb(c);
 
        pr_info("Last level iTLB entries: 4KB %d, 2MB %d, 4MB %d\n",
-               tlb_lli_4k[ENTRIES], tlb_lli_2m[ENTRIES],
-               tlb_lli_4m[ENTRIES]);
+               tlb_lli_4k, tlb_lli_2m, tlb_lli_4m);
 
        pr_info("Last level dTLB entries: 4KB %d, 2MB %d, 4MB %d, 1GB %d\n",
-               tlb_lld_4k[ENTRIES], tlb_lld_2m[ENTRIES],
-               tlb_lld_4m[ENTRIES], tlb_lld_1g[ENTRIES]);
+               tlb_lld_4k, tlb_lld_2m, tlb_lld_4m, tlb_lld_1g);
 }
 
 void get_cpu_vendor(struct cpuinfo_x86 *c)

diff --git a/arch/x86/kernel/cpu/hygon.c b/arch/x86/kernel/cpu/hygon.c
index c5191b06f9f21b5ca79da96a3d5d6792d95deffe..6af4a4a90a521f2c0d3b5d7eca328d95cd82e8af 100644 (file)
--- a/arch/x86/kernel/cpu/hygon.c
+++ b/arch/x86/kernel/cpu/hygon.c
@@ -240,26 +240,26 @@ static void cpu_detect_tlb_hygon(struct cpuinfo_x86 *c)
 
        cpuid(0x80000006, &eax, &ebx, &ecx, &edx);
 
-       tlb_lld_4k[ENTRIES] = (ebx >> 16) & mask;
-       tlb_lli_4k[ENTRIES] = ebx & mask;
+       tlb_lld_4k = (ebx >> 16) & mask;
+       tlb_lli_4k = ebx & mask;
 
        /* Handle DTLB 2M and 4M sizes, fall back to L1 if L2 is disabled */
        if (!((eax >> 16) & mask))
-               tlb_lld_2m[ENTRIES] = (cpuid_eax(0x80000005) >> 16) & 0xff;
+               tlb_lld_2m = (cpuid_eax(0x80000005) >> 16) & 0xff;
        else
-               tlb_lld_2m[ENTRIES] = (eax >> 16) & mask;
+               tlb_lld_2m = (eax >> 16) & mask;
 
        /* a 4M entry uses two 2M entries */
-       tlb_lld_4m[ENTRIES] = tlb_lld_2m[ENTRIES] >> 1;
+       tlb_lld_4m = tlb_lld_2m >> 1;
 
        /* Handle ITLB 2M and 4M sizes, fall back to L1 if L2 is disabled */
        if (!(eax & mask)) {
                cpuid(0x80000005, &eax, &ebx, &ecx, &edx);
-               tlb_lli_2m[ENTRIES] = eax & 0xff;
+               tlb_lli_2m = eax & 0xff;
        } else
-               tlb_lli_2m[ENTRIES] = eax & mask;
+               tlb_lli_2m = eax & mask;
 
-       tlb_lli_4m[ENTRIES] = tlb_lli_2m[ENTRIES] >> 1;
+       tlb_lli_4m = tlb_lli_2m >> 1;
 }
 
 static const struct cpu_dev hygon_cpu_dev = {

diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 42a57b85f93bd90b6c8fca8bada760ca1b217695..61d3fd31baeeb6d7ba554c56ac70ed231ee7ac5f 100644 (file)
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -718,55 +718,55 @@ static void intel_tlb_lookup(const unsigned char desc)
        entries = intel_tlb_table[k].entries;
        switch (intel_tlb_table[k].tlb_type) {
        case STLB_4K:
-               tlb_lli_4k[ENTRIES] = max(tlb_lli_4k[ENTRIES], entries);
-               tlb_lld_4k[ENTRIES] = max(tlb_lld_4k[ENTRIES], entries);
+               tlb_lli_4k = max(tlb_lli_4k, entries);
+               tlb_lld_4k = max(tlb_lld_4k, entries);
                break;
        case STLB_4K_2M:
-               tlb_lli_4k[ENTRIES] = max(tlb_lli_4k[ENTRIES], entries);
-               tlb_lld_4k[ENTRIES] = max(tlb_lld_4k[ENTRIES], entries);
-               tlb_lli_2m[ENTRIES] = max(tlb_lli_2m[ENTRIES], entries);
-               tlb_lld_2m[ENTRIES] = max(tlb_lld_2m[ENTRIES], entries);
-               tlb_lli_4m[ENTRIES] = max(tlb_lli_4m[ENTRIES], entries);
-               tlb_lld_4m[ENTRIES] = max(tlb_lld_4m[ENTRIES], entries);
+               tlb_lli_4k = max(tlb_lli_4k, entries);
+               tlb_lld_4k = max(tlb_lld_4k, entries);
+               tlb_lli_2m = max(tlb_lli_2m, entries);
+               tlb_lld_2m = max(tlb_lld_2m, entries);
+               tlb_lli_4m = max(tlb_lli_4m, entries);
+               tlb_lld_4m = max(tlb_lld_4m, entries);
                break;
        case TLB_INST_ALL:
-               tlb_lli_4k[ENTRIES] = max(tlb_lli_4k[ENTRIES], entries);
-               tlb_lli_2m[ENTRIES] = max(tlb_lli_2m[ENTRIES], entries);
-               tlb_lli_4m[ENTRIES] = max(tlb_lli_4m[ENTRIES], entries);
+               tlb_lli_4k = max(tlb_lli_4k, entries);
+               tlb_lli_2m = max(tlb_lli_2m, entries);
+               tlb_lli_4m = max(tlb_lli_4m, entries);
                break;
        case TLB_INST_4K:
-               tlb_lli_4k[ENTRIES] = max(tlb_lli_4k[ENTRIES], entries);
+               tlb_lli_4k = max(tlb_lli_4k, entries);
                break;
        case TLB_INST_4M:
-               tlb_lli_4m[ENTRIES] = max(tlb_lli_4m[ENTRIES], entries);
+               tlb_lli_4m = max(tlb_lli_4m, entries);
                break;
        case TLB_INST_2M_4M:
-               tlb_lli_2m[ENTRIES] = max(tlb_lli_2m[ENTRIES], entries);
-               tlb_lli_4m[ENTRIES] = max(tlb_lli_4m[ENTRIES], entries);
+               tlb_lli_2m = max(tlb_lli_2m, entries);
+               tlb_lli_4m = max(tlb_lli_4m, entries);
                break;
        case TLB_DATA_4K:
        case TLB_DATA0_4K:
-               tlb_lld_4k[ENTRIES] = max(tlb_lld_4k[ENTRIES], entries);
+               tlb_lld_4k = max(tlb_lld_4k, entries);
                break;
        case TLB_DATA_4M:
        case TLB_DATA0_4M:
-               tlb_lld_4m[ENTRIES] = max(tlb_lld_4m[ENTRIES], entries);
+               tlb_lld_4m = max(tlb_lld_4m, entries);
                break;
        case TLB_DATA_2M_4M:
        case TLB_DATA0_2M_4M:
-               tlb_lld_2m[ENTRIES] = max(tlb_lld_2m[ENTRIES], entries);
-               tlb_lld_4m[ENTRIES] = max(tlb_lld_4m[ENTRIES], entries);
+               tlb_lld_2m = max(tlb_lld_2m, entries);
+               tlb_lld_4m = max(tlb_lld_4m, entries);
                break;
        case TLB_DATA_4K_4M:
-               tlb_lld_4k[ENTRIES] = max(tlb_lld_4k[ENTRIES], entries);
-               tlb_lld_4m[ENTRIES] = max(tlb_lld_4m[ENTRIES], entries);
+               tlb_lld_4k = max(tlb_lld_4k, entries);
+               tlb_lld_4m = max(tlb_lld_4m, entries);
                break;
        case TLB_DATA_1G_2M_4M:
-               tlb_lld_2m[ENTRIES] = max(tlb_lld_2m[ENTRIES], TLB_0x63_2M_4M_ENTRIES);
-               tlb_lld_4m[ENTRIES] = max(tlb_lld_4m[ENTRIES], TLB_0x63_2M_4M_ENTRIES);
+               tlb_lld_2m = max(tlb_lld_2m, TLB_0x63_2M_4M_ENTRIES);
+               tlb_lld_4m = max(tlb_lld_4m, TLB_0x63_2M_4M_ENTRIES);
                fallthrough;
        case TLB_DATA_1G:
-               tlb_lld_1g[ENTRIES] = max(tlb_lld_1g[ENTRIES], entries);
+               tlb_lld_1g = max(tlb_lld_1g, entries);
                break;
        }
 }