]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
drm/panthor: Update panthor_mmu::irq::mask when needed
authorBoris Brezillon <boris.brezillon@collabora.com>
Fri, 4 Apr 2025 08:09:31 +0000 (10:09 +0200)
committerBoris Brezillon <boris.brezillon@collabora.com>
Thu, 10 Apr 2025 13:00:11 +0000 (15:00 +0200)
When we clear the faulty bits in the AS mask, we also need to update
the panthor_mmu::irq::mask field otherwise our IRQ handler won't get
called again until the GPU is reset.

Changes in v2:
- Add Liviu's R-b

Changes in v3:
- Add Steve's R-b

Fixes: 647810ec2476 ("drm/panthor: Add the MMU/VM logical block")
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
Reviewed-by: Steven Price <steven.price@arm.com>
Link: https://lore.kernel.org/r/20250404080933.2912674-4-boris.brezillon@collabora.com
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
drivers/gpu/drm/panthor/panthor_mmu.c

index 12a02e28f50fd8338a37e822d0c3bc4d2a3b260b..7cca97d298ea10768c31a6842c29c7b74ff1f9b3 100644 (file)
@@ -781,6 +781,7 @@ out_enable_as:
        if (ptdev->mmu->as.faulty_mask & panthor_mmu_as_fault_mask(ptdev, as)) {
                gpu_write(ptdev, MMU_INT_CLEAR, panthor_mmu_as_fault_mask(ptdev, as));
                ptdev->mmu->as.faulty_mask &= ~panthor_mmu_as_fault_mask(ptdev, as);
+               ptdev->mmu->irq.mask |= panthor_mmu_as_fault_mask(ptdev, as);
                gpu_write(ptdev, MMU_INT_MASK, ~ptdev->mmu->as.faulty_mask);
        }