]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
ARM: at91: pm: Enable ULP0/ULP1 for SAMA7D65
authorRyan Wanner <Ryan.Wanner@microchip.com>
Thu, 27 Feb 2025 15:51:59 +0000 (08:51 -0700)
committerClaudiu Beznea <claudiu.beznea@tuxon.dev>
Sun, 2 Mar 2025 15:38:54 +0000 (17:38 +0200)
New clocks are saved to enable ULP0/ULP1 for SAMA7D65 because this SoC has a
total of 9 main clocks that need to be saved for ULP0/ULP1 mode.

Add mcks member to at91_pm_data, this will be used to determine
how many main clocks need to be saved. In the pm_mcks variable will also make
sure that no unnecessary clock settings are written during
mck_ps_restore.

Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/2ac0832f6ede17a5c111ede09b44b8a126e33e36.1740671156.git.Ryan.Wanner@microchip.com
[claudiu.beznea: adjusted the entry in pmc_infos[] array]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
arch/arm/mach-at91/pm.c
arch/arm/mach-at91/pm.h
arch/arm/mach-at91/pm_data-offsets.c
arch/arm/mach-at91/pm_suspend.S

index a2d188b4786693d3d513dcc50e7561a6900146e0..3aa20038ad932b5f311702aca4a206b841123d45 100644 (file)
@@ -1339,6 +1339,7 @@ struct pmc_info {
        unsigned long uhp_udp_mask;
        unsigned long mckr;
        unsigned long version;
+       unsigned long mcks;
 };
 
 static const struct pmc_info pmc_infos[] __initconst = {
@@ -1370,11 +1371,13 @@ static const struct pmc_info pmc_infos[] __initconst = {
        {
                .mckr = 0x28,
                .version = AT91_PMC_V2,
+               .mcks = 4,
        },
        {
                .uhp_udp_mask = AT91SAM926x_PMC_UHP,
                .mckr = 0x28,
                .version = AT91_PMC_V2,
+               .mcks = 9,
        },
 };
 
@@ -1463,6 +1466,7 @@ static void __init at91_pm_init(void (*pm_idle)(void))
        soc_pm.data.uhp_udp_mask = pmc->uhp_udp_mask;
        soc_pm.data.pmc_mckr_offset = pmc->mckr;
        soc_pm.data.pmc_version = pmc->version;
+       soc_pm.data.pmc_mcks = pmc->mcks;
 
        if (pm_idle)
                arm_pm_idle = pm_idle;
index 53bdc9000e4479e92ccf03922399206fa83a00ab..50c3a425d14006bbe969dc4515c100de1b79fb79 100644 (file)
@@ -39,6 +39,7 @@ struct at91_pm_data {
        unsigned int suspend_mode;
        unsigned int pmc_mckr_offset;
        unsigned int pmc_version;
+       unsigned int pmc_mcks;
 };
 #endif
 
index 40bd4e8fe40a52b2788af6be8c5d4ab09df8bd5c..0ca5da66dc26202060df888116a819df249cd7fe 100644 (file)
@@ -18,6 +18,8 @@ int main(void)
                                                 pmc_mckr_offset));
        DEFINE(PM_DATA_PMC_VERSION,     offsetof(struct at91_pm_data,
                                                 pmc_version));
+       DEFINE(PM_DATA_PMC_MCKS,        offsetof(struct at91_pm_data,
+                                                pmc_mcks));
 
        return 0;
 }
index e5869cca5e7916d4fc77ea41fd618c0ab03b842f..e23b868340965634d7b7d2fc549be1c6abd61ae9 100644 (file)
@@ -814,18 +814,20 @@ sr_dis_exit:
 .endm
 
 /**
- * at91_mckx_ps_enable:        save MCK1..4 settings and switch it to main clock
+ * at91_mckx_ps_enable:        save MCK settings and switch it to main clock
  *
- * Side effects: overwrites tmp1, tmp2
+ * Side effects: overwrites tmp1, tmp2, tmp3
  */
 .macro at91_mckx_ps_enable
 #ifdef CONFIG_SOC_SAMA7
        ldr     pmc, .pmc_base
+       ldr     tmp3, .mcks
 
-       /* There are 4 MCKs we need to handle: MCK1..4 */
+       /* Start at MCK1 and go until MCKs */
        mov     tmp1, #1
-e_loop:        cmp     tmp1, #5
-       beq     e_done
+e_loop:
+       cmp     tmp1, tmp3
+       bgt     e_done
 
        /* Write MCK ID to retrieve the settings. */
        str     tmp1, [pmc, #AT91_PMC_MCR_V2]
@@ -850,7 +852,37 @@ e_save_mck3:
        b       e_ps
 
 e_save_mck4:
+       cmp     tmp1, #4
+       bne     e_save_mck5
        str     tmp2, .saved_mck4
+       b       e_ps
+
+e_save_mck5:
+       cmp     tmp1, #5
+       bne     e_save_mck6
+       str     tmp2, .saved_mck5
+       b       e_ps
+
+e_save_mck6:
+       cmp     tmp1, #6
+       bne     e_save_mck7
+       str     tmp2, .saved_mck6
+       b       e_ps
+
+e_save_mck7:
+       cmp     tmp1, #7
+       bne     e_save_mck8
+       str     tmp2, .saved_mck7
+       b       e_ps
+
+e_save_mck8:
+       cmp     tmp1, #8
+       bne     e_save_mck9
+       str     tmp2, .saved_mck8
+       b       e_ps
+
+e_save_mck9:
+       str     tmp2, .saved_mck9
 
 e_ps:
        /* Use CSS=MAINCK and DIV=1. */
@@ -870,18 +902,20 @@ e_done:
 .endm
 
 /**
- * at91_mckx_ps_restore: restore MCK1..4 settings
+ * at91_mckx_ps_restore: restore MCKx settings
  *
  * Side effects: overwrites tmp1, tmp2
  */
 .macro at91_mckx_ps_restore
 #ifdef CONFIG_SOC_SAMA7
        ldr     pmc, .pmc_base
+       ldr     tmp2, .mcks
 
-       /* There are 4 MCKs we need to handle: MCK1..4 */
+       /* Start from MCK1 and go up to MCKs */
        mov     tmp1, #1
-r_loop:        cmp     tmp1, #5
-       beq     r_done
+r_loop:
+       cmp     tmp1, tmp2
+       bgt     r_done
 
 r_save_mck1:
        cmp     tmp1, #1
@@ -902,7 +936,37 @@ r_save_mck3:
        b       r_ps
 
 r_save_mck4:
+       cmp     tmp1, #4
+       bne     r_save_mck5
        ldr     tmp2, .saved_mck4
+       b       r_ps
+
+r_save_mck5:
+       cmp     tmp1, #5
+       bne     r_save_mck6
+       ldr     tmp2, .saved_mck5
+       b       r_ps
+
+r_save_mck6:
+       cmp     tmp1, #6
+       bne     r_save_mck7
+       ldr     tmp2, .saved_mck6
+       b       r_ps
+
+r_save_mck7:
+       cmp     tmp1, #7
+       bne     r_save_mck8
+       ldr     tmp2, .saved_mck7
+       b       r_ps
+
+r_save_mck8:
+       cmp     tmp1, #8
+       bne     r_save_mck9
+       ldr     tmp2, .saved_mck8
+       b       r_ps
+
+r_save_mck9:
+       ldr     tmp2, .saved_mck9
 
 r_ps:
        /* Write MCK ID to retrieve the settings. */
@@ -921,6 +985,7 @@ r_ps:
        wait_mckrdy tmp1
 
        add     tmp1, tmp1, #1
+       ldr     tmp2, .mcks
        b       r_loop
 r_done:
 #endif
@@ -1045,6 +1110,10 @@ ENTRY(at91_pm_suspend_in_sram)
        str     tmp1, .memtype
        ldr     tmp1, [r0, #PM_DATA_MODE]
        str     tmp1, .pm_mode
+#ifdef CONFIG_SOC_SAMA7
+       ldr     tmp1, [r0, #PM_DATA_PMC_MCKS]
+       str     tmp1, .mcks
+#endif
 
        /*
         * ldrne below are here to preload their address in the TLB as access
@@ -1132,6 +1201,10 @@ ENDPROC(at91_pm_suspend_in_sram)
        .word 0
 .pmc_version:
        .word 0
+#ifdef CONFIG_SOC_SAMA7
+.mcks:
+       .word 0
+#endif
 .saved_mckr:
        .word 0
 .saved_pllar:
@@ -1155,6 +1228,16 @@ ENDPROC(at91_pm_suspend_in_sram)
        .word 0
 .saved_mck4:
        .word 0
+.saved_mck5:
+       .word 0
+.saved_mck6:
+       .word 0
+.saved_mck7:
+       .word 0
+.saved_mck8:
+       .word 0
+.saved_mck9:
+       .word 0
 #endif
 
 ENTRY(at91_pm_suspend_in_sram_sz)