ARM: tegra: apalis-tk1: enable emmc ddr52 mode

Add mmc-ddr-1_8v property enabling eMMC DDR52 mode.

root@apalis-tk1-mainline:~# cat /sys/kernel/debug/mmc2/ios
clock:          52000000 Hz
actual clock:   52000000 Hz
vdd:            21 (3.3 ~ 3.4 V)
bus mode:       2 (push-pull)
chip select:    0 (don't care)
power mode:     2 (on)
bus width:      3 (8 bits)
timing spec:    8 (mmc DDR52)
signal voltage: 1 (1.80 V)
driver type:    0 (driver type B)
root@apalis-tk1-mainline:~# hdparm -t /dev/mmcblk2

/dev/mmcblk2:
 Timing buffered disk reads: 256 MB in  3.02 seconds =  84.83 MB/sec

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
index 3408317c0f00afaa4977f8387e816e336d3bd5fb..37e443e21ce638a0277bbd370ea8e23b597af180 100644 (file)
--- a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
@@ -1919,6 +1919,7 @@
                non-removable;
                vmmc-supply = <&reg_module_3v3>; /* VCC */
                vqmmc-supply = <&reg_1v8_vddio>; /* VCCQ */
+               mmc-ddr-1_8v;
        };
 
        /* CPU DFLL clock */

diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi b/arch/arm/boot/dts/tegra124-apalis.dtsi
index ba6fc2e51b2d0687c6b454517dd8134f98b2933d..f76580f6cc80145b14fb937fd93e44d6872b7941 100644 (file)
--- a/arch/arm/boot/dts/tegra124-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis.dtsi
@@ -1948,6 +1948,7 @@
                non-removable;
                vmmc-supply = <&reg_module_3v3>; /* VCC */
                vqmmc-supply = <&reg_1v8_vddio>; /* VCCQ */
+               mmc-ddr-1_8v;
        };
 
        /* CPU DFLL clock */