]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
aarch64-cores.def: Add entries for "cortex-a53" and "cortex-a57".
authorYufeng Zhang <yufeng.zhang@arm.com>
Wed, 2 Jan 2013 15:13:54 +0000 (15:13 +0000)
committerYufeng Zhang <yufeng@gcc.gnu.org>
Wed, 2 Jan 2013 15:13:54 +0000 (15:13 +0000)
gcc/

2013-01-02  Yufeng Zhang  <yufeng.zhang@arm.com>

* config/aarch64/aarch64-cores.def: Add entries for "cortex-a53" and
"cortex-a57".
* config/aarch64/aarch64-tune.md: Re-generate.

From-SVN: r194807

gcc/ChangeLog
gcc/config/aarch64/aarch64-cores.def
gcc/config/aarch64/aarch64-tune.md

index 10592b898858bb157bd0c7198709f19f6703910a..e8b7a349353fb42f9aa0597e38e8faef220a298b 100644 (file)
@@ -1,3 +1,9 @@
+2013-01-02  Yufeng Zhang  <yufeng.zhang@arm.com>
+
+       * config/aarch64/aarch64-cores.def: Add entries for "cortex-a53" and
+       "cortex-a57".
+       * config/aarch64/aarch64-tune.md: Re-generate.
+
 2013-01-02  Richard Biener  <rguenther@suse.de>
 
        * tree-vect-stmts.c (vectorizable_load): When vectorizing an
index 06cc9825d3987568253d45ae0ee49ad0c021f24c..4b77009ab7d0bcb156c8ff18f7c546166a0a3cf0 100644 (file)
@@ -34,5 +34,7 @@
    This list currently contains example CPUs that implement AArch64, and
    therefore serves as a template for adding more CPUs in the future.  */
 
+AARCH64_CORE("cortex-a53",       cortexa53,         8,  AARCH64_FL_FPSIMD,    generic)
+AARCH64_CORE("cortex-a57",       cortexa57,         8,  AARCH64_FL_FPSIMD,    generic)
 AARCH64_CORE("example-1",            large,         8,  AARCH64_FL_FPSIMD,    generic)
 AARCH64_CORE("example-2",            small,         8,  AARCH64_FL_FPSIMD,    generic)
index a654a91b43b531cf7fed6396ec77f0a1f761e06f..02699e35c3fca8e00b45347c68e3b17286df721b 100644 (file)
@@ -1,5 +1,5 @@
 ;; -*- buffer-read-only: t -*-
 ;; Generated automatically by gentune.sh from aarch64-cores.def
 (define_attr "tune"
-       "large,small"
+       "cortexa53,cortexa57,large,small"
        (const (symbol_ref "((enum attr_tune) aarch64_tune)")))