]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
r8169: add helper rtl_csi_mod for accessing extended config space
authorHeiner Kallweit <hkallweit1@gmail.com>
Wed, 9 Apr 2025 19:05:37 +0000 (21:05 +0200)
committerJakub Kicinski <kuba@kernel.org>
Fri, 11 Apr 2025 03:16:43 +0000 (20:16 -0700)
Add a helper for the Realtek-specific mechanism for accessing extended
config space if native access isn't possible.
This avoids code duplication.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Link: https://patch.msgid.link/b368fd91-57d7-4cb5-9342-98b4d8fe9aea@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
drivers/net/ethernet/realtek/r8169_main.c

index 4eebd9cb40a37031540cb3af539a2902156b33bb..8e62b109518b2cca1457fb8779be685835e8246b 100644 (file)
@@ -2852,10 +2852,23 @@ static u32 rtl_csi_read(struct rtl8169_private *tp, int addr)
                RTL_R32(tp, CSIDR) : ~0;
 }
 
+static void rtl_csi_mod(struct rtl8169_private *tp, int addr,
+                       u32 mask, u32 set)
+{
+       u32 val;
+
+       WARN(addr % 4, "Invalid CSI address %#x\n", addr);
+
+       netdev_notice_once(tp->dev,
+               "No native access to PCI extended config space, falling back to CSI\n");
+
+       val = rtl_csi_read(tp, addr);
+       rtl_csi_write(tp, addr, (val & ~mask) | set);
+}
+
 static void rtl_disable_zrxdc_timeout(struct rtl8169_private *tp)
 {
        struct pci_dev *pdev = tp->pci_dev;
-       u32 csi;
        int rc;
        u8 val;
 
@@ -2872,16 +2885,12 @@ static void rtl_disable_zrxdc_timeout(struct rtl8169_private *tp)
                }
        }
 
-       netdev_notice_once(tp->dev,
-               "No native access to PCI extended config space, falling back to CSI\n");
-       csi = rtl_csi_read(tp, RTL_GEN3_RELATED_OFF);
-       rtl_csi_write(tp, RTL_GEN3_RELATED_OFF, csi & ~RTL_GEN3_ZRXDC_NONCOMPL);
+       rtl_csi_mod(tp, RTL_GEN3_RELATED_OFF, RTL_GEN3_ZRXDC_NONCOMPL, 0);
 }
 
 static void rtl_set_aspm_entry_latency(struct rtl8169_private *tp, u8 val)
 {
        struct pci_dev *pdev = tp->pci_dev;
-       u32 csi;
 
        /* According to Realtek the value at config space address 0x070f
         * controls the L0s/L1 entrance latency. We try standard ECAM access
@@ -2893,10 +2902,7 @@ static void rtl_set_aspm_entry_latency(struct rtl8169_private *tp, u8 val)
            pci_write_config_byte(pdev, 0x070f, val) == PCIBIOS_SUCCESSFUL)
                return;
 
-       netdev_notice_once(tp->dev,
-               "No native access to PCI extended config space, falling back to CSI\n");
-       csi = rtl_csi_read(tp, 0x070c) & 0x00ffffff;
-       rtl_csi_write(tp, 0x070c, csi | val << 24);
+       rtl_csi_mod(tp, 0x070c, 0xff000000, val << 24);
 }
 
 static void rtl_set_def_aspm_entry_latency(struct rtl8169_private *tp)