]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
[i386] Introduce scalar version of avx512f_vmscalef.
authorUros Bizjak <ubizjak@gmail.com>
Thu, 12 Aug 2021 19:18:46 +0000 (21:18 +0200)
committerUros Bizjak <ubizjak@gmail.com>
Thu, 12 Aug 2021 19:19:46 +0000 (21:19 +0200)
2021-08-12  Uroš Bizjak  <ubizjak@gmail.com>

gcc/
PR target/98309
* config/i386/i386.md (avx512f_scalef<mode>2): New insn pattern.
(ldexp<mode>3): Use avx512f_scalef<mode>2.
(UNSPEC_SCALEF): Move from ...
* config/i386/sse.md (UNSPEC_SCALEF): ... here.

gcc/config/i386/i386.md
gcc/config/i386/sse.md

index 56b09c566ed99f90d2648b247bd755ac168384f3..4a8e8fea290cd144096ae7dfe9ebf51cc7ac56fd 100644 (file)
   UNSPEC_RSQRT
   UNSPEC_PSADBW
 
+  ;; For AVX512F support
+  UNSPEC_SCALEF
+
   ;; Generic math support
   UNSPEC_COPYSIGN
   UNSPEC_XORSIGN
   DONE;
 })
 
+(define_insn "avx512f_scalef<mode>2"
+  [(set (match_operand:MODEF 0 "register_operand" "=v")
+       (unspec:MODEF
+         [(match_operand:MODEF 1 "register_operand" "v")
+          (match_operand:MODEF 2 "nonimmediate_operand" "vm")]
+         UNSPEC_SCALEF))]
+  "TARGET_AVX512F"
+  "vscalef<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
+  [(set_attr "prefix" "evex")
+   (set_attr "mode"  "<MODE>")])
+
 (define_expand "ldexpxf3"
   [(match_operand:XF 0 "register_operand")
    (match_operand:XF 1 "register_operand")
   if (TARGET_AVX512F && TARGET_SSE_MATH)
    {
      rtx op2 = gen_reg_rtx (<MODE>mode);
-     emit_insn (gen_floatsi<mode>2 (op2, operands[2]));
-     operands[0] = lowpart_subreg (<ssevecmodef>mode, operands[0], <MODE>mode);
-     if (MEM_P (operands[1]))
+
+     if (!nonimmediate_operand (operands[1], <MODE>mode))
        operands[1] = force_reg (<MODE>mode, operands[1]);
-     operands[1] = lowpart_subreg (<ssevecmodef>mode, operands[1], <MODE>mode);
-     op2 = lowpart_subreg (<ssevecmodef>mode, op2, <MODE>mode);
-     emit_insn (gen_avx512f_vmscalef<ssevecmodelower> (operands[0],
-                                                      operands[1],
-                                                      op2));
+
+     emit_insn (gen_floatsi<mode>2 (op2, operands[2]));
+     emit_insn (gen_avx512f_scalef<mode>2 (operands[0], operands[1], op2));
    }
   else
     {
index 3a7bbaec7af3a3950674592cd04fe95c62912aed..60e69a470e7626bafe5cfc46a56d8f4fd70bc4e8 100644 (file)
@@ -92,7 +92,6 @@
   UNSPEC_RCP14
   UNSPEC_RSQRT14
   UNSPEC_FIXUPIMM
-  UNSPEC_SCALEF
   UNSPEC_VTERNLOG
   UNSPEC_GETEXP
   UNSPEC_GETMANT