UNSPEC_RSQRT
UNSPEC_PSADBW
+ ;; For AVX512F support
+ UNSPEC_SCALEF
+
;; Generic math support
UNSPEC_COPYSIGN
UNSPEC_XORSIGN
DONE;
})
+(define_insn "avx512f_scalef<mode>2"
+ [(set (match_operand:MODEF 0 "register_operand" "=v")
+ (unspec:MODEF
+ [(match_operand:MODEF 1 "register_operand" "v")
+ (match_operand:MODEF 2 "nonimmediate_operand" "vm")]
+ UNSPEC_SCALEF))]
+ "TARGET_AVX512F"
+ "vscalef<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
+ [(set_attr "prefix" "evex")
+ (set_attr "mode" "<MODE>")])
+
(define_expand "ldexpxf3"
[(match_operand:XF 0 "register_operand")
(match_operand:XF 1 "register_operand")
if (TARGET_AVX512F && TARGET_SSE_MATH)
{
rtx op2 = gen_reg_rtx (<MODE>mode);
- emit_insn (gen_floatsi<mode>2 (op2, operands[2]));
- operands[0] = lowpart_subreg (<ssevecmodef>mode, operands[0], <MODE>mode);
- if (MEM_P (operands[1]))
+
+ if (!nonimmediate_operand (operands[1], <MODE>mode))
operands[1] = force_reg (<MODE>mode, operands[1]);
- operands[1] = lowpart_subreg (<ssevecmodef>mode, operands[1], <MODE>mode);
- op2 = lowpart_subreg (<ssevecmodef>mode, op2, <MODE>mode);
- emit_insn (gen_avx512f_vmscalef<ssevecmodelower> (operands[0],
- operands[1],
- op2));
+
+ emit_insn (gen_floatsi<mode>2 (op2, operands[2]));
+ emit_insn (gen_avx512f_scalef<mode>2 (operands[0], operands[1], op2));
}
else
{