ARM: dts: renesas: r9a06g032: Add the ADC device

The ADC available in the r9a06g032 SoC can use up to two internal ADC
cores (ADC1 and ADC2) those internal cores are handled through ADC
controller virtual channels.

Describe this device.

Signed-off-by: Herve Codina (Schneider Electric) <herve.codina@bootlin.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251103141834.71677-4-herve.codina@bootlin.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm/boot/dts/renesas/r9a06g032.dtsi b/arch/arm/boot/dts/renesas/r9a06g032.dtsi
index 95e12b34f8bad37e80678777a3230b825480fdb8..8debb77803bb9a58ed98f02c12a583012ceabaa8 100644 (file)
--- a/arch/arm/boot/dts/renesas/r9a06g032.dtsi
+++ b/arch/arm/boot/dts/renesas/r9a06g032.dtsi
@@ -290,6 +290,16 @@
                        status = "disabled";
                };
 
+               adc: adc@40065000 {
+                       compatible = "renesas,r9a06g032-adc", "renesas,rzn1-adc";
+                       reg = <0x40065000 0x200>;
+                       clocks = <&sysctrl R9A06G032_HCLK_ADC>, <&sysctrl R9A06G032_CLK_ADC>;
+                       clock-names = "pclk", "adc";
+                       power-domains = <&sysctrl>;
+                       #io-channel-cells = <1>;
+                       status = "disabled";
+               };
+
                pinctrl: pinctrl@40067000 {
                        compatible = "renesas,r9a06g032-pinctrl", "renesas,rzn1-pinctrl";
                        reg = <0x40067000 0x1000>, <0x51000000 0x480>;