]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/i915/gsc: mei interrupt top half should be in irq disabled context
authorJunxiao Chang <junxiao.chang@intel.com>
Fri, 25 Apr 2025 15:11:07 +0000 (23:11 +0800)
committerJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
Tue, 1 Jul 2025 05:10:46 +0000 (08:10 +0300)
MEI GSC interrupt comes from i915. It has top half and bottom half.
Top half is called from i915 interrupt handler. It should be in
irq disabled context.

With RT kernel, by default i915 IRQ handler is in threaded IRQ. MEI GSC
top half might be in threaded IRQ context. generic_handle_irq_safe API
could be called from either IRQ or process context, it disables local
IRQ then calls MEI GSC interrupt top half.

This change fixes A380/A770 GPU boot hang issue with RT kernel.

Fixes: 1e3dc1d8622b ("drm/i915/gsc: add gsc as a mei auxiliary device")
Tested-by: Furong Zhou <furong.zhou@intel.com>
Suggested-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Acked-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Junxiao Chang <junxiao.chang@intel.com>
Link: https://lore.kernel.org/r/20250425151108.643649-1-junxiao.chang@intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
(cherry picked from commit dccf655f69002d496a527ba441b4f008aa5bebbf)
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
drivers/gpu/drm/i915/gt/intel_gsc.c

index 1e925c75fb080d22ff6d43cef574f928f4fe4b49..c43febc862dc3dc66cf0738eaac8dd14feead9aa 100644 (file)
@@ -284,7 +284,7 @@ static void gsc_irq_handler(struct intel_gt *gt, unsigned int intf_id)
        if (gt->gsc.intf[intf_id].irq < 0)
                return;
 
-       ret = generic_handle_irq(gt->gsc.intf[intf_id].irq);
+       ret = generic_handle_irq_safe(gt->gsc.intf[intf_id].irq);
        if (ret)
                gt_err_ratelimited(gt, "error handling GSC irq: %d\n", ret);
 }