2017-12-20 Adhemerval Zanella <adhemerval.zanella@linaro.org>
+ * sysdeps/tile/__longjmp.S (__longjmp): Use lowercase instructions.
+ * sysdeps/tile/__tls_get_addr.S (__tls_get_addr): Likewise.
+ * sysdeps/tile/_mcount.S (__mcount): Likewise.
+ * sysdeps/tile/crti.S (_init, _fini): Likewise.
+ * sysdeps/tile/crtn.S: Likewise.
+ * sysdeps/tile/dl-start.S (_start): Likewise.
+ * sysdeps/tile/dl-trampoline.S: Likewise.
+ * sysdeps/tile/setjmp.S (__sigsetjmp): Likewise.
+ * sysdeps/tile/start.S (_start): Likewise.
+ * sysdeps/unix/sysv/linux/tile/clone.S (_clone): Likewise.
+ * sysdeps/unix/sysv/linux/tile/getcontext.S (__getcontext): Likewise.
+ * sysdeps/unix/sysv/linux/tile/ioctl.S (__ioctl): Likewise.
+ * sysdeps/unix/sysv/linux/tile/setcontext.S (__setcontext): Likewise.
+ * sysdeps/unix/sysv/linux/tile/swapcontext.S (__swapcontext): Likewise.
+ * sysdeps/unix/sysv/linux/tile/syscall.S (syscall): Likewise.
+ * sysdeps/unix/sysv/linux/tile/vfork.S (__vfork): Likewise.
+
* stdlib/bug-getcontext.c (do_test): Remove tilepro mention in
comment.
* sysdeps/tile/preconfigure: Remove tilegx folder.
ENTRY (__longjmp)
FEEDBACK_ENTER(__longjmp)
-#define RESTORE(r) { LD r, r0 ; ADDI_PTR r0, r0, REGSIZE }
+#define RESTORE(r) { ld r, r0 ; ADDI_PTR r0, r0, REGSIZE }
FOR_EACH_CALLEE_SAVED_REG(RESTORE)
/* Make longjmp(buf, 0) return "1" instead.
we can validly load EX_CONTEXT for iret without being
interrupted halfway through. */
{
- LD r2, r0 /* retrieve ICS bit from jmp_buf */
+ ld r2, r0 /* retrieve ICS bit from jmp_buf */
movei r3, 1
- CMPEQI r0, r1, 0
+ cmpeqi r0, r1, 0
}
{
mtspr INTERRUPT_CRITICAL_SECTION, r3
}
{
LD_PTR r29, r29 /* r29 = ti_offset */
- CMPEQ r25, r28, r25 /* r25 nonzero if generation OK */
+ cmpeq r25, r28, r25 /* r25 nonzero if generation OK */
shli r28, r26, LOG_SIZEOF_DTV_T /* byte index into dtv array */
}
{
- BEQZ r25, .Lslowpath
- CMPEQI r25, r26, -1 /* r25 nonzero if ti_module invalid */
+ beqz r25, .Lslowpath
+ cmpeqi r25, r26, -1 /* r25 nonzero if ti_module invalid */
}
{
- BNEZ r25, .Lslowpath
+ bnez r25, .Lslowpath
ADD_PTR r28, r28, r27 /* pointer into module array */
}
LD_PTR r26, r28 /* r26 = module TLS pointer */
- CMPEQI r25, r26, -1 /* check r26 == TLS_DTV_UNALLOCATED */
- BNEZ r25, .Lslowpath
+ cmpeqi r25, r26, -1 /* check r26 == TLS_DTV_UNALLOCATED */
+ bnez r25, .Lslowpath
{
ADD_PTR r0, r26, r29
jrp lr
.Lslowpath:
{
- ST sp, lr
+ st sp, lr
ADDLI_PTR r29, sp, - (25 * REGSIZE)
}
cfi_offset (lr, 0)
{
- ST r29, sp
+ st r29, sp
ADDLI_PTR sp, sp, - (26 * REGSIZE)
}
cfi_def_cfa_offset (26 * REGSIZE)
ADDI_PTR r29, sp, (2 * REGSIZE)
- { ST r29, r1; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r2; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r3; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r4; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r5; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r6; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r7; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r8; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r9; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r10; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r11; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r12; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r13; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r14; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r15; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r16; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r17; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r18; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r19; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r20; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r21; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r22; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r23; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r24; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r1; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r2; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r3; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r4; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r5; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r6; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r7; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r8; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r9; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r10; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r11; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r12; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r13; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r14; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r15; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r16; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r17; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r18; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r19; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r20; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r21; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r22; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r23; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r24; ADDI_PTR r29, r29, REGSIZE }
.hidden __tls_get_addr_slow
jal __tls_get_addr_slow
ADDI_PTR r29, sp, (2 * REGSIZE)
- { LD r1, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r2, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r3, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r4, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r5, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r6, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r7, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r8, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r9, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r10, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r11, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r12, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r13, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r14, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r15, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r16, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r17, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r18, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r19, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r20, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r21, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r22, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r23, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r24, r29; ADDLI_PTR sp, sp, (26 * REGSIZE) }
+ { ld r1, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r2, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r3, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r4, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r5, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r6, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r7, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r8, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r9, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r10, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r11, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r12, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r13, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r14, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r15, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r16, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r17, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r18, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r19, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r20, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r21, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r22, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r23, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r24, r29; ADDLI_PTR sp, sp, (26 * REGSIZE) }
cfi_def_cfa_offset (0)
- LD lr, sp
+ ld lr, sp
jrp lr
END (__tls_get_addr)
.text
ENTRY(__mcount)
{
- ST sp, lr
+ st sp, lr
ADDI_PTR r29, sp, - (12 * REGSIZE)
}
cfi_offset (lr, 0)
{
ADDI_PTR sp, sp, - (13 * REGSIZE)
- ST r29, sp
+ st r29, sp
ADDI_PTR r29, r29, REGSIZE
}
cfi_def_cfa_offset (13 * REGSIZE)
- { ST r29, r0; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r1; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r2; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r3; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r4; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r5; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r6; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r7; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r8; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r9; ADDI_PTR r29, r29, REGSIZE }
- { ST r29, r10; ADDI_PTR r29, r29, REGSIZE; move r0, r10 }
+ { st r29, r0; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r1; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r2; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r3; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r4; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r5; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r6; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r7; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r8; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r9; ADDI_PTR r29, r29, REGSIZE }
+ { st r29, r10; ADDI_PTR r29, r29, REGSIZE; move r0, r10 }
{
move r1, lr
jal __mcount_internal
{
ADDI_PTR r29, sp, (2 * REGSIZE)
}
- { LD r0, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r1, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r2, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r3, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r4, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r5, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r6, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r7, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r8, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r9, r29; ADDI_PTR r29, r29, REGSIZE }
- { LD r10, r29; ADDI_PTR sp, sp, (13 * REGSIZE) }
+ { ld r0, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r1, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r2, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r3, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r4, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r5, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r6, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r7, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r8, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r9, r29; ADDI_PTR r29, r29, REGSIZE }
+ { ld r10, r29; ADDI_PTR sp, sp, (13 * REGSIZE) }
cfi_def_cfa_offset (0)
{
- LD lr, sp
+ ld lr, sp
}
{
move lr, r10
{
move r29, sp
ADDI_PTR r28, sp, -REGSIZE
- ST sp, lr
+ st sp, lr
}
ADDI_PTR sp, sp, -(2 * REGSIZE)
- ST r28, r29
+ st r28, r29
#if PREINIT_FUNCTION_WEAK
lnk r2
0:
ADD_PTR r0, r0, r1
ADD_PTR r0, r0, r2
LD_PTR r0, r0
- BEQZ r0, .Lno_weak_fn
+ beqz r0, .Lno_weak_fn
jalr r0
#elif !defined(NO_PLT_PCREL)
/* Since we are calling from the start of the object to the PLT,
{
move r29, sp
ADDI_PTR r28, sp, -REGSIZE
- ST sp, lr
+ st sp, lr
}
ADDI_PTR sp, sp, -(2 * REGSIZE)
- ST r28, r29
+ st r28, r29
ADDI_PTR r29, sp, (2 * REGSIZE)
{
ADDI_PTR sp, sp, (2 * REGSIZE)
- LD lr, r29
+ ld lr, r29
}
jrp lr
ADDI_PTR r29, sp, (2 * REGSIZE)
{
ADDI_PTR sp, sp, (2 * REGSIZE)
- LD lr, r29
+ ld lr, r29
}
jrp lr
/* Save zero for caller sp in our 'caller' save area, and make
sure lr has a zero value, to limit backtraces. */
move lr, zero
- ST r4, zero
+ st r4, zero
}
{
move r0, r52
in which case we have to adjust the argument vector. */
lnk r51; .Llink:
pic_addr r4, _dl_skip_args
- LD4U r4, r4
- BEQZT r4, .Lno_skip
+ ld4u r4, r4
+ beqzt r4, .Lno_skip
/* Load the argc word at the initial sp and adjust it.
We basically jump "sp" up over the first few argv entries
f(r20); f(r21); f(r22); f(r23); \
f(r24); f(r25)
-#define SAVE(REG) { ST r27, REG; ADDI_PTR r27, r27, REGSIZE }
-#define RESTORE(REG) { LD REG, r27; ADDI_PTR r27, r27, REGSIZE }
+#define SAVE(REG) { st r27, REG; ADDI_PTR r27, r27, REGSIZE }
+#define RESTORE(REG) { ld REG, r27; ADDI_PTR r27, r27, REGSIZE }
.macro dl_resolve, name, profile, framesize
.text
\name:
cfi_startproc
{
- ST sp, lr
+ st sp, lr
move r26, sp
}
{
}
cfi_def_cfa_offset (\framesize)
{
- ST r27, r26
+ st r27, r26
ADDI_PTR r27, r27, FRAME_REGS - FRAME_SP
}
FOR_EACH_REG(SAVE)
{
- ST r27, lr
+ st r27, lr
ADDLI_PTR r27, sp, FRAME_TPNT
}
cfi_offset (lr, FRAME_LR - \framesize)
.if \profile
{
move r0, r28 /* tpnt value */
- ST r27, r28
+ st r27, r28
ADDI_PTR r27, r27, FRAME_INDEX - FRAME_TPNT
}
{
move r1, r29 /* PLT index */
- ST r27, r29
+ st r27, r29
}
{
move r2, lr /* retaddr */
}
ADDLI_PTR r28, sp, FRAME_STACKFRAME
LD_PTR r28, r28
- BGTZ r28, 1f
+ bgtz r28, 1f
.else
{
move r0, r28 /* tpnt value 1 */
FOR_EACH_REG(RESTORE)
.if \profile
ADDLI_PTR r28, sp, FRAME_STACKFRAME
- LD r28, r28
- BGTZ r28, 1f
+ ld r28, r28
+ bgtz r28, 1f
.endif
{
/* Restore original user return address. */
- LD lr, r27
+ ld lr, r27
/* Pop off our stack frame. */
ADDLI_PTR sp, sp, \framesize
}
}
FOR_EACH_REG(SAVE)
{
- LD r0, r28
+ ld r0, r28
ADDI_PTR r28, r28, FRAME_INDEX - FRAME_TPNT
}
{
- LD r1, r28
+ ld r1, r28
ADDLI_PTR r2, sp, FRAME_REGS
}
{
}
FOR_EACH_REG(RESTORE)
{
- LD lr, lr
+ ld lr, lr
ADDLI_PTR sp, sp, \framesize
}
jrp lr
1:
move r2, r0
-#define SAVE(r) { ST r2, r ; ADDI_PTR r2, r2, REGSIZE }
+#define SAVE(r) { st r2, r ; ADDI_PTR r2, r2, REGSIZE }
FOR_EACH_CALLEE_SAVED_REG(SAVE)
mfspr r3, INTERRUPT_CRITICAL_SECTION
- ST r2, r3
+ st r2, r3
j plt(__sigjmp_save)
jrp lr /* Keep the backtracer happy. */
END(__sigsetjmp)
/* Zero out callee space for return address. Unnecessary but free.
This is just paranoia to help backtracing not go awry. */
- ST sp, zero
+ st sp, zero
}
{
/* Zero out our frame pointer for __libc_start_main. */
- ST r12, zero
+ st r12, zero
/* Zero out lr to make __libc_start_main the end of backtrace. */
move lr, zero
/* Create a stack frame so we can pass callee-saves to new task. */
{
move r10, sp
- ST sp, lr
+ st sp, lr
ADDI_PTR sp, sp, -FRAME_SIZE
}
cfi_offset (lr, 0)
cfi_def_cfa_offset (FRAME_SIZE)
ADDI_PTR r11, sp, FRAME_SP
{
- ST r11, r10
+ st r11, r10
ADDI_PTR r11, sp, FRAME_R30
}
{
- ST r11, r30
+ st r11, r30
ADDI_PTR r11, sp, FRAME_R31
}
cfi_offset (r30, FRAME_R30 - FRAME_SIZE)
{
- ST r11, r31
+ st r11, r31
ADDI_PTR r11, sp, FRAME_R32
}
cfi_offset (r31, FRAME_R31 - FRAME_SIZE)
- ST r11, r32
+ st r11, r32
cfi_offset (r32, FRAME_R32 - FRAME_SIZE)
/* sanity check arguments */
- BEQZ r0, .Linvalid
- BEQZ r1, .Linvalid
+ beqz r0, .Linvalid
+ beqz r1, .Linvalid
/* Make sure child stack is properly aligned, and set up the
top frame so that we can call out of it immediately in the
ADDI_PTR r1, r1, -C_ABI_SAVE_AREA_SIZE
andi r1, r1, -C_ABI_SAVE_AREA_SIZE
ADDI_PTR r9, r1, REGSIZE /* sp of this frame on entry, i.e. zero */
- ST r9, zero
+ st r9, zero
/* We need to switch the argument convention around from
libc to kernel:
moveli TREG_SYSCALL_NR_NAME, __NR_clone
}
swint1
- BEQZ r0, .Lthread_start /* If in child task. */
+ beqz r0, .Lthread_start /* If in child task. */
.Ldone:
/* Restore the callee-saved registers and return. */
ADDLI_PTR lr, sp, FRAME_SIZE
{
- LD lr, lr
+ ld lr, lr
ADDLI_PTR r30, sp, FRAME_R30
}
{
- LD r30, r30
+ ld r30, r30
ADDLI_PTR r31, sp, FRAME_R31
}
{
- LD r31, r31
+ ld r31, r31
ADDLI_PTR r32, sp, FRAME_R32
}
{
- LD r32, r32
+ ld r32, r32
ADDI_PTR sp, sp, FRAME_SIZE
}
cfi_def_cfa_offset (0)
- BNEZ r1, .Lerror
+ bnez r1, .Lerror
jrp lr
.Lerror:
Save value "1" to uc_flags to later recognize getcontext(). */
{ movei r11, 1; ADDI_PTR r10, r0, UC_FLAGS_OFFSET }
{ ST_PTR r10, r11; addli r10, r0, UC_REG(30) }
- { ST r10, r30; ADDI_PTR r10, r10, REGSIZE }
- { ST r10, r31; ADDI_PTR r10, r10, REGSIZE }
- { ST r10, r32; ADDI_PTR r10, r10, REGSIZE }
- { ST r10, r33; ADDI_PTR r10, r10, REGSIZE }
- { ST r10, r34; ADDI_PTR r10, r10, REGSIZE }
- { ST r10, r35; ADDI_PTR r10, r10, REGSIZE }
- { ST r10, r36; ADDI_PTR r10, r10, REGSIZE }
- { ST r10, r37; ADDI_PTR r10, r10, REGSIZE }
- { ST r10, r38; ADDI_PTR r10, r10, REGSIZE }
- { ST r10, r39; ADDI_PTR r10, r10, REGSIZE }
- { ST r10, r40; ADDI_PTR r10, r10, REGSIZE }
- { ST r10, r41; ADDI_PTR r10, r10, REGSIZE }
- { ST r10, r42; ADDI_PTR r10, r10, REGSIZE }
- { ST r10, r43; ADDI_PTR r10, r10, REGSIZE }
- { ST r10, r44; ADDI_PTR r10, r10, REGSIZE }
- { ST r10, r45; ADDI_PTR r10, r10, REGSIZE }
- { ST r10, r46; ADDI_PTR r10, r10, REGSIZE }
- { ST r10, r47; ADDI_PTR r10, r10, REGSIZE }
- { ST r10, r48; ADDI_PTR r10, r10, REGSIZE }
- { ST r10, r49; ADDI_PTR r10, r10, REGSIZE }
- { ST r10, r50; ADDI_PTR r10, r10, REGSIZE }
- { ST r10, r51; ADDI_PTR r10, r10, REGSIZE }
- { ST r10, r52; ADDI_PTR r10, r10, REGSIZE }
- { ST r10, tp; ADDI_PTR r10, r10, REGSIZE }
- { ST r10, sp; ADDI_PTR r10, r10, REGSIZE }
- { ST r10, lr; ADDI_PTR r10, r10, REGSIZE }
+ { st r10, r30; ADDI_PTR r10, r10, REGSIZE }
+ { st r10, r31; ADDI_PTR r10, r10, REGSIZE }
+ { st r10, r32; ADDI_PTR r10, r10, REGSIZE }
+ { st r10, r33; ADDI_PTR r10, r10, REGSIZE }
+ { st r10, r34; ADDI_PTR r10, r10, REGSIZE }
+ { st r10, r35; ADDI_PTR r10, r10, REGSIZE }
+ { st r10, r36; ADDI_PTR r10, r10, REGSIZE }
+ { st r10, r37; ADDI_PTR r10, r10, REGSIZE }
+ { st r10, r38; ADDI_PTR r10, r10, REGSIZE }
+ { st r10, r39; ADDI_PTR r10, r10, REGSIZE }
+ { st r10, r40; ADDI_PTR r10, r10, REGSIZE }
+ { st r10, r41; ADDI_PTR r10, r10, REGSIZE }
+ { st r10, r42; ADDI_PTR r10, r10, REGSIZE }
+ { st r10, r43; ADDI_PTR r10, r10, REGSIZE }
+ { st r10, r44; ADDI_PTR r10, r10, REGSIZE }
+ { st r10, r45; ADDI_PTR r10, r10, REGSIZE }
+ { st r10, r46; ADDI_PTR r10, r10, REGSIZE }
+ { st r10, r47; ADDI_PTR r10, r10, REGSIZE }
+ { st r10, r48; ADDI_PTR r10, r10, REGSIZE }
+ { st r10, r49; ADDI_PTR r10, r10, REGSIZE }
+ { st r10, r50; ADDI_PTR r10, r10, REGSIZE }
+ { st r10, r51; ADDI_PTR r10, r10, REGSIZE }
+ { st r10, r52; ADDI_PTR r10, r10, REGSIZE }
+ { st r10, tp; ADDI_PTR r10, r10, REGSIZE }
+ { st r10, sp; ADDI_PTR r10, r10, REGSIZE }
+ { st r10, lr; ADDI_PTR r10, r10, REGSIZE }
lnk r11 /* Point PC at the "jrp lr" instruction. */
addli r11, r11, .Lreturn - .
- { ST r10, r11; ADDI_PTR r10, r10, REGSIZE }
+ { st r10, r11; ADDI_PTR r10, r10, REGSIZE }
mfspr r11, INTERRUPT_CRITICAL_SECTION
{
- ST r10, r11
+ st r10, r11
movei r1, 0
}
moveli TREG_SYSCALL_NR_NAME, __NR_rt_sigprocmask
}
swint1
- BNEZ r1, .Lsyscall_error
+ bnez r1, .Lsyscall_error
.Lreturn:
{
moveli TREG_SYSCALL_NR_NAME, __NR_ioctl
}
swint1
- BNEZ r1, 0f
+ bnez r1, 0f
jrp lr
PSEUDO_END (__ioctl)
libc_hidden_def (__ioctl)
#endif
LD_PTR r10, r0
{
- BEQZ r10, .Lsigreturn
+ beqz r10, .Lsigreturn
addi r10, r10, -1 /* Confirm that it has value "1". */
}
- BNEZ r10, .Lbadcontext
+ bnez r10, .Lbadcontext
/* Save lr and r0 briefly on the stack and set the signal mask:
rt_sigprocmask (SIG_SETMASK, &ucp->uc_sigmask, NULL, _NSIG / 8). */
{
- ST sp, lr
+ st sp, lr
ADDI_PTR r11, sp, -(2 * REGSIZE)
move r10, sp
}
cfi_def_cfa_offset (3 * REGSIZE)
cfi_offset (lr, 0)
{
- ST r11, r10
+ st r11, r10
ADDI_PTR r10, sp, (2 * REGSIZE)
}
{
- ST r10, r0
+ st r10, r0
ADDLI_PTR r1, r0, UC_SIGMASK_OFFSET
}
cfi_offset (r0, -REGSIZE)
swint1
ADDI_PTR r11, sp, 2 * REGSIZE /* Restore uc_context to r11. */
{
- LD r11, r11
+ ld r11, r11
ADDI_PTR sp, sp, 3 * REGSIZE
}
cfi_def_cfa_offset (0)
- LD lr, sp
+ ld lr, sp
{
ADDI_PTR r10, r11, UC_REG(0)
- BNEZ r1, .Lsyscall_error
+ bnez r1, .Lsyscall_error
}
/* Restore the argument registers; note they will be random
unless makecontext() has been called. */
- { LD r0, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r1, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r2, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r3, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r4, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r5, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r6, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r7, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r8, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r9, r10; ADDLI_PTR r10, r10, UC_REG(30) - UC_REG(9) }
+ { ld r0, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r1, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r2, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r3, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r4, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r5, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r6, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r7, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r8, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r9, r10; ADDLI_PTR r10, r10, UC_REG(30) - UC_REG(9) }
/* Restore the callee-saved GPRs. */
- { LD r30, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r31, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r32, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r33, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r34, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r35, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r36, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r37, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r38, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r39, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r40, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r41, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r42, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r43, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r44, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r45, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r46, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r47, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r48, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r49, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r50, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r51, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r52, r10; ADDI_PTR r10, r10, REGSIZE * 2 }
+ { ld r30, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r31, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r32, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r33, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r34, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r35, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r36, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r37, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r38, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r39, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r40, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r41, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r42, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r43, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r44, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r45, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r46, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r47, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r48, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r49, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r50, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r51, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r52, r10; ADDI_PTR r10, r10, REGSIZE * 2 }
/* Skip tp since it must not change for a given thread. */
- { LD sp, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD lr, r10; ADDI_PTR r10, r10, REGSIZE }
- { LD r11, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld sp, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld lr, r10; ADDI_PTR r10, r10, REGSIZE }
+ { ld r11, r10; ADDI_PTR r10, r10, REGSIZE }
/* Construct an iret context; we set ICS so we can validly load
EX_CONTEXT for iret without being interrupted halfway through. */
{
- LD r12, r10
+ ld r12, r10
movei r13, 1
}
{
cfi_def_cfa_offset (C_ABI_SAVE_AREA_SIZE + SI_MAX_SIZE + UC_SIZE)
moveli r2, UC_SIZE / REGSIZE
0: {
- LD r10, r0
+ ld r10, r0
ADDI_PTR r0, r0, REGSIZE
}
{
- ST r1, r10
+ st r1, r10
ADDI_PTR r1, r1, REGSIZE
addi r2, r2, -1
}
- BNEZ r2, 0b
+ bnez r2, 0b
moveli TREG_SYSCALL_NR_NAME, __NR_rt_sigreturn
swint1
cfi_undefined (lr)
FEEDBACK_ENTER(__startcontext)
jalr r31
- BEQZ r30, 1f
+ beqz r30, 1f
{
move r0, r30
jal __setcontext
FEEDBACK_ENTER(__swapcontext)
/* Set up a frame and save r0 and r1. */
{
- ST sp, lr
+ st sp, lr
ADDI_PTR r11, sp, -(3 * REGSIZE)
move r10, sp
}
cfi_def_cfa_offset (4 * REGSIZE)
cfi_offset (lr, 0)
{
- ST r11, r10
+ st r11, r10
ADDI_PTR r10, sp, (2 * REGSIZE)
}
{
- ST r10, r0
+ st r10, r0
ADDI_PTR r10, sp, (3 * REGSIZE)
}
- ST r10, r1
+ st r10, r1
/* Save the current context. */
jal __getcontext
/* Tear down the frame and restore r0, r1, and lr. */
{
- BNEZ r0, .Lerror
+ bnez r0, .Lerror
ADDI_PTR r1, sp, 3 * REGSIZE
}
{
- LD r1, r1
+ ld r1, r1
ADDI_PTR r0, sp, 2 * REGSIZE
}
{
- LD r0, r0
+ ld r0, r0
ADDI_PTR sp, sp, 4 * REGSIZE
}
cfi_def_cfa_offset (0)
{
- LD lr, sp
+ ld lr, sp
ADDLI_PTR r10, r0, UC_REG(54)
}
/* Update the stored sp and lr. */
{
- ST r10, sp
+ st r10, sp
ADDLI_PTR r10, r0, UC_REG(55)
}
- ST r10, lr
+ st r10, lr
/* Tail-call setcontext to finish up. */
{
.Lerror:
ADDI_PTR sp, sp, 4 * REGSIZE
cfi_def_cfa_offset (0)
- LD lr, sp
+ ld lr, sp
jrp lr
END (__swapcontext)
{ move r3, r4; move r4, r5 }
{ move r5, r6; move r6, r7 }
swint1
- BNEZ r1, 0f
+ bnez r1, 0f
jrp lr
PSEUDO_END (syscall)
moveli TREG_SYSCALL_NR_NAME, __NR_clone
swint1
- BNEZ r1, 0f
+ bnez r1, 0f
jrp lr
PSEUDO_END (__vfork)
libc_hidden_def (__vfork)
projects / thirdparty / glibc.git / commitdiff
