5.10-stable patches

added patches:
	arm64-add-part-number-for-arm-cortex-a78ae.patch

diff --git a/queue-5.10/arm64-add-part-number-for-arm-cortex-a78ae.patch b/queue-5.10/arm64-add-part-number-for-arm-cortex-a78ae.patch
new file mode 100644 (file)
index 0000000..4056e19
--- /dev/null
+++ b/queue-5.10/arm64-add-part-number-for-arm-cortex-a78ae.patch
@@ -0,0 +1,56 @@
+From 83bea32ac7ed37bbda58733de61fc9369513f9f9 Mon Sep 17 00:00:00 2001
+From: Chanho Park <chanho61.park@samsung.com>
+Date: Thu, 7 Apr 2022 18:11:28 +0900
+Subject: arm64: Add part number for Arm Cortex-A78AE
+
+From: Chanho Park <chanho61.park@samsung.com>
+
+commit 83bea32ac7ed37bbda58733de61fc9369513f9f9 upstream.
+
+Add the MIDR part number info for the Arm Cortex-A78AE[1] and add it to
+spectre-BHB affected list[2].
+
+[1]: https://developer.arm.com/Processors/Cortex-A78AE
+[2]: https://developer.arm.com/Arm%20Security%20Center/Spectre-BHB
+
+Cc: Catalin Marinas <catalin.marinas@arm.com>
+Cc: Mark Rutland <mark.rutland@arm.com>
+Cc: Will Deacon <will@kernel.org>
+Cc: James Morse <james.morse@arm.com>
+Signed-off-by: Chanho Park <chanho61.park@samsung.com>
+Link: https://lore.kernel.org/r/20220407091128.8700-1-chanho61.park@samsung.com
+Signed-off-by: Will Deacon <will@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/include/asm/cputype.h |    2 ++
+ arch/arm64/kernel/proton-pack.c  |    1 +
+ 2 files changed, 3 insertions(+)
+
+--- a/arch/arm64/include/asm/cputype.h
++++ b/arch/arm64/include/asm/cputype.h
+@@ -75,6 +75,7 @@
+ #define ARM_CPU_PART_CORTEX_A77               0xD0D
+ #define ARM_CPU_PART_NEOVERSE_V1      0xD40
+ #define ARM_CPU_PART_CORTEX_A78               0xD41
++#define ARM_CPU_PART_CORTEX_A78AE     0xD42
+ #define ARM_CPU_PART_CORTEX_X1                0xD44
+ #define ARM_CPU_PART_CORTEX_A510      0xD46
+ #define ARM_CPU_PART_CORTEX_A710      0xD47
+@@ -123,6 +124,7 @@
+ #define MIDR_CORTEX_A77       MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A77)
+ #define MIDR_NEOVERSE_V1      MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V1)
+ #define MIDR_CORTEX_A78       MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78)
++#define MIDR_CORTEX_A78AE     MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78AE)
+ #define MIDR_CORTEX_X1        MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X1)
+ #define MIDR_CORTEX_A510 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A510)
+ #define MIDR_CORTEX_A710 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A710)
+--- a/arch/arm64/kernel/proton-pack.c
++++ b/arch/arm64/kernel/proton-pack.c
+@@ -861,6 +861,7 @@ u8 spectre_bhb_loop_affected(int scope)
+       if (scope == SCOPE_LOCAL_CPU) {
+               static const struct midr_range spectre_bhb_k32_list[] = {
+                       MIDR_ALL_VERSIONS(MIDR_CORTEX_A78),
++                      MIDR_ALL_VERSIONS(MIDR_CORTEX_A78AE),
+                       MIDR_ALL_VERSIONS(MIDR_CORTEX_A78C),
+                       MIDR_ALL_VERSIONS(MIDR_CORTEX_X1),
+                       MIDR_ALL_VERSIONS(MIDR_CORTEX_A710),

diff --git a/queue-5.10/series b/queue-5.10/series
index 13a7397f7e82be25cb99c031a80405398750abf3..6184cc02f4cebfc8c4bba6c44c17e22bf1f9fdf1 100644 (file)
--- a/queue-5.10/series
+++ b/queue-5.10/series
@@ -131,3 +131,4 @@ iommu-omap-fix-regression-in-probe-for-null-pointer-.patch
 perf-arm-spe-fix-perf-report-mem-mode.patch
 perf-tools-fix-perf-s-libperf_print-callback.patch
 perf-session-remap-buf-if-there-is-no-space-for-even.patch
+arm64-add-part-number-for-arm-cortex-a78ae.patch