+Wed Feb 5 23:12:57 CET 2003 Jan Hubicka <jh@suse.cz>
+
+ * i386-protos.h (x86_emit_floatuns): Declare.
+ * i386.c (x86_emit_floatuns): New global function.
+ * i386.md (floatunssisf2, floatunsdisf2,
+ floatunsdidf2): New patterns.
+
2003-01-25 Zdenek Dvorak <rakdver@atrey.karlin.mff.cuni.cz>
* cfgloopmanip.c (force_single_succ_latches): Fix missindentation.
return for_each_rtx (&PATTERN (insn), extended_reg_mentioned_1, NULL);
}
+/* Generate an unsigned DImode to FP conversion. This is the same code
+ optabs would emit if we didn't have TFmode patterns. */
+
+void
+x86_emit_floatuns (operands)
+ rtx operands[2];
+{
+ rtx neglab, donelab, i0, i1, f0, in, out;
+ enum machine_mode mode;
+
+ out = operands[0];
+ in = force_reg (DImode, operands[1]);
+ mode = GET_MODE (out);
+ neglab = gen_label_rtx ();
+ donelab = gen_label_rtx ();
+ i1 = gen_reg_rtx (Pmode);
+ f0 = gen_reg_rtx (mode);
+
+ emit_cmp_and_jump_insns (in, const0_rtx, LT, const0_rtx, Pmode, 0, neglab);
+
+ emit_insn (gen_rtx_SET (VOIDmode, out, gen_rtx_FLOAT (mode, in)));
+ emit_jump_insn (gen_jump (donelab));
+ emit_barrier ();
+
+ emit_label (neglab);
+
+ i0 = expand_simple_binop (Pmode, LSHIFTRT, in, const1_rtx, NULL, 1, OPTAB_DIRECT);
+ i1 = expand_simple_binop (Pmode, AND, in, const1_rtx, NULL, 1, OPTAB_DIRECT);
+ i0 = expand_simple_binop (Pmode, IOR, i0, i1, i0, 1, OPTAB_DIRECT);
+ expand_float (f0, i0, 0);
+ emit_insn (gen_rtx_SET (VOIDmode, out, gen_rtx_PLUS (mode, f0, f0)));
+
+ emit_label (donelab);
+}
+
#include "gt-i386.h"
ix86_free_from_memory (GET_MODE (operands[1]));
DONE;
})
+
+(define_expand "floatunssisf2"
+ [(use (match_operand:SF 0 "register_operand" ""))
+ (use (match_operand:SI 1 "register_operand" ""))]
+ "TARGET_SSE && TARGET_SSE_MATH && !TARGET_64BIT"
+ "x86_emit_floatuns (operands); DONE;")
+
+(define_expand "floatunsdisf2"
+ [(use (match_operand:SF 0 "register_operand" ""))
+ (use (match_operand:DI 1 "register_operand" ""))]
+ "TARGET_SSE && TARGET_SSE_MATH && TARGET_64BIT"
+ "x86_emit_floatuns (operands); DONE;")
+
+(define_expand "floatunsdidf2"
+ [(use (match_operand:DF 0 "register_operand" ""))
+ (use (match_operand:DI 1 "register_operand" ""))]
+ "TARGET_SSE2 && TARGET_SSE_MATH && TARGET_64BIT"
+ "x86_emit_floatuns (operands); DONE;")
\f
;; Add instructions