[ARM] PR target/79145 Fix xordi3 expander for immediate operands in iWMMXt

	PR target/79145
	* config/arm/arm.md (xordi3): Force constant operand into a register
	for TARGET_IWMMXT.

	* gcc.target/arm/pr79145.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@244894 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c648e574896882e2300c8b862ac6d2b957facfe1..6bd1c69982f818b10abd98262807e02c7f8cf71d 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2016-01-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       PR target/79145
+       * config/arm/arm.md (xordi3): Force constant operand into a register
+       for TARGET_IWMMXT.
+
 2016-01-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 
        * doc/invoke.texi (-fstore-merging): Correct default optimization

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 446fb226f6a48755786da73f621ef8d433d001cb..8720a7178d3efdad489ad27d7dca788005dd19ee 100644 (file)
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -3313,7 +3313,14 @@
        (xor:DI (match_operand:DI 1 "s_register_operand" "")
                (match_operand:DI 2 "arm_xordi_operand" "")))]
   "TARGET_32BIT"
-  ""
+  {
+    /* The iWMMXt pattern for xordi3 accepts only register operands but we want
+       to reuse this expander for all TARGET_32BIT targets so just force the
+       constants into a register.  Unlike for the anddi3 and iordi3 there are
+       no NEON instructions that take an immediate.  */
+    if (TARGET_IWMMXT && !REG_P (operands[2]))
+      operands[2] = force_reg (DImode, operands[2]);
+  }
 )
 
 (define_insn_and_split "*xordi3_insn"

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 65cae6f383742744766d5218b21d3fc51ef77a51..9eb748f9fde58bf69fdeff88e45646d5c25a6ce2 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2016-01-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       PR target/79145
+       * gcc.target/arm/pr79145.c: New test.
+
 2017-01-25  Richard Biener  <rguenther@suse.de>
 
        PR debug/78363

diff --git a/gcc/testsuite/gcc.target/arm/pr79145.c b/gcc/testsuite/gcc.target/arm/pr79145.c
new file mode 100644 (file)
index 0000000..6678244
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr79145.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-mcpu=*" } { "-mcpu=iwmmxt" } } */
+/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-mabi=*" } { "-mabi=iwmmxt" } } */
+/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-march=*" } { "-march=iwmmxt" } } */
+/* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } { "-mthumb" } { "" } } */
+/* { dg-require-effective-target arm32 } */
+/* { dg-require-effective-target arm_iwmmxt_ok } */
+/* { dg-options "-mcpu=iwmmxt" } */
+
+int
+main (void)
+{
+  volatile long long t1;
+  t1 ^= 0x55;
+  return 0;
+}