LoongArch: Remove QHSD and use QHWD instead

QHSD and QHWD are basically the same thing, but QHSD will be incorrect
when we start to add LA32 support.  So it's just better to always use
QHWD.

gcc/ChangeLog:

	* config/loongarch/loongarch.md (QHSD): Remove.
	(loongarch_<crc>_w_<size>_w): Use QHSD instead of QHWD.
	(loongarch_<crc>_w_<size>_w_extended): Likewise.

diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md
index a65cc1de2d2e268571d2191a17d67bd32263170b..bf322240271ce3333b491224e3dcd3dbd1bae4b6 100644 (file)
--- a/gcc/config/loongarch/loongarch.md
+++ b/gcc/config/loongarch/loongarch.md
@@ -4345,13 +4345,12 @@
 
 
 
-(define_mode_iterator QHSD [QI HI SI DI])
 (define_int_iterator CRC [UNSPEC_CRC UNSPEC_CRCC])
 (define_int_attr crc [(UNSPEC_CRC "crc") (UNSPEC_CRCC "crcc")])
 
 (define_insn "loongarch_<crc>_w_<size>_w"
   [(set (match_operand:SI 0 "register_operand" "=r")
-       (unspec:SI [(match_operand:QHSD 1 "register_operand" "r")
+       (unspec:SI [(match_operand:QHWD 1 "register_operand" "r")
                   (match_operand:SI 2 "register_operand" "r")]
                     CRC))]
   ""
@@ -4362,7 +4361,7 @@
 (define_insn "loongarch_<crc>_w_<size>_w_extended"
   [(set (match_operand:DI 0 "register_operand" "=r")
        (sign_extend:DI
-         (unspec:SI [(match_operand:QHSD 1 "register_operand" "r")
+         (unspec:SI [(match_operand:QHWD 1 "register_operand" "r")
                      (match_operand:SI 2 "register_operand" "r")]
                     CRC)))]
   "TARGET_64BIT"