Revert "power: supply: qcom_battmgr: support disabling charge control"

The charge control disabling does not work as expected and needs
more time to be figured out correctly. Drop this feature for now.

Reported-by: Val Packett <val@packett.cool>
Closes: https://lore.kernel.org/all/8f003bfb-8279-4c65-a271-c1e4a029043d@packett.cool/
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>

diff --git a/drivers/power/supply/qcom_battmgr.c b/drivers/power/supply/qcom_battmgr.c
index e6f01e0122e1c1ad28489066a949352e14bb4957..c8028606bba0090c2fd90de63a095c05cc614ce3 100644 (file)
--- a/drivers/power/supply/qcom_battmgr.c
+++ b/drivers/power/supply/qcom_battmgr.c
@@ -257,7 +257,6 @@ struct qcom_battmgr_info {
        unsigned int capacity_warning;
        unsigned int cycle_count;
        unsigned int charge_count;
-       bool charge_ctrl_enable;
        unsigned int charge_ctrl_start;
        unsigned int charge_ctrl_end;
        char model_number[BATTMGR_STRING_LEN];
@@ -660,13 +659,13 @@ static int qcom_battmgr_bat_get_property(struct power_supply *psy,
 }
 
 static int qcom_battmgr_set_charge_control(struct qcom_battmgr *battmgr,
-                                          bool enable, u32 target_soc, u32 delta_soc)
+                                          u32 target_soc, u32 delta_soc)
 {
        struct qcom_battmgr_charge_ctrl_request request = {
                .hdr.owner = cpu_to_le32(PMIC_GLINK_OWNER_BATTMGR),
                .hdr.type = cpu_to_le32(PMIC_GLINK_REQ_RESP),
                .hdr.opcode = cpu_to_le32(BATTMGR_CHG_CTRL_LIMIT_EN),
-               .enable = cpu_to_le32(enable),
+               .enable = cpu_to_le32(1),
                .target_soc = cpu_to_le32(target_soc),
                .delta_soc = cpu_to_le32(delta_soc),
        };
@@ -678,7 +677,6 @@ static int qcom_battmgr_set_charge_start_threshold(struct qcom_battmgr *battmgr,
 {
        u32 target_soc, delta_soc;
        int ret;
-       bool enable = start_soc != 0;
 
        start_soc = clamp(start_soc, CHARGE_CTRL_START_THR_MIN, CHARGE_CTRL_START_THR_MAX);
 
@@ -698,10 +696,9 @@ static int qcom_battmgr_set_charge_start_threshold(struct qcom_battmgr *battmgr,
        }
 
        mutex_lock(&battmgr->lock);
-       ret = qcom_battmgr_set_charge_control(battmgr, enable, target_soc, delta_soc);
+       ret = qcom_battmgr_set_charge_control(battmgr, target_soc, delta_soc);
        mutex_unlock(&battmgr->lock);
        if (!ret) {
-               battmgr->info.charge_ctrl_enable = enable;
                battmgr->info.charge_ctrl_start = start_soc;
                battmgr->info.charge_ctrl_end = target_soc;
        }
@@ -713,7 +710,6 @@ static int qcom_battmgr_set_charge_end_threshold(struct qcom_battmgr *battmgr, i
 {
        u32 delta_soc = CHARGE_CTRL_DELTA_SOC;
        int ret;
-       bool enable = battmgr->info.charge_ctrl_enable;
 
        end_soc = clamp(end_soc, CHARGE_CTRL_END_THR_MIN, CHARGE_CTRL_END_THR_MAX);
 
@@ -721,7 +717,7 @@ static int qcom_battmgr_set_charge_end_threshold(struct qcom_battmgr *battmgr, i
                delta_soc = end_soc - battmgr->info.charge_ctrl_start;
 
        mutex_lock(&battmgr->lock);
-       ret = qcom_battmgr_set_charge_control(battmgr, enable, end_soc, delta_soc);
+       ret = qcom_battmgr_set_charge_control(battmgr, end_soc, delta_soc);
        mutex_unlock(&battmgr->lock);
        if (!ret) {
                battmgr->info.charge_ctrl_start = end_soc - delta_soc;