arm64: dts: qcom: x1e80100: Fix PCIe 6a reg offsets and add MHI

The actual size of the DBI region is 0xf20 and the start of the
ELBI region is 0xf40, according to the documentation. So fix them.
While at it, add the MHI region as well.

Fixes: 5eb83fc10289 ("arm64: dts: qcom: x1e80100: Add PCIe nodes")
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20240604-x1e80100-dts-fixes-pcie6a-v2-1-0b4d8c6256e5@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
index 5f90a0b3c0166d5bfe78f1a5e56f98abbff6bb61..05e4d491ec18c4bb0cbdbade6d62deab7f857e90 100644 (file)
--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
@@ -2737,15 +2737,17 @@
                        device_type = "pci";
                        compatible = "qcom,pcie-x1e80100";
                        reg = <0 0x01bf8000 0 0x3000>,
-                             <0 0x70000000 0 0xf1d>,
-                             <0 0x70000f20 0 0xa8>,
+                             <0 0x70000000 0 0xf20>,
+                             <0 0x70000f40 0 0xa8>,
                              <0 0x70001000 0 0x1000>,
-                             <0 0x70100000 0 0x100000>;
+                             <0 0x70100000 0 0x100000>,
+                             <0 0x01bfb000 0 0x1000>;
                        reg-names = "parf",
                                    "dbi",
                                    "elbi",
                                    "atu",
-                                   "config";
+                                   "config",
+                                   "mhi";
                        #address-cells = <3>;
                        #size-cells = <2>;
                        ranges = <0x01000000 0 0x00000000 0 0x70200000 0 0x100000>,