re PR target/46280 (Several testcases FAIL with 16byte alignment ABI warning on Solar...

	gcc:
	* config/i386/i386.c (ix86_function_arg_boundary): Fix warning
	message.

	gcc/testsuite:
	* gcc.dg/pr35442.c: Adapt warning.

	PR target/46280
	* g++.dg/eh/simd-2.C: Add -msse to dg-options, add
	dg-require-effective-target sse_runtime for for i?86-*-*, x86_64-*-*.
	* g++.dg/torture/pr36444.C: Add dg-options -msse for
	i?86-*-* x86_64-*-*.
	* g++.dg/torture/pr36445.C: Likewise.
	* gcc.c-torture/compile/pr34856.c: Likewise.
	* gcc.c-torture/compile/pr39928-1.c: Likewise.
	* gcc.c-torture/compile/vector-1.c: Likewise.
	* gcc.c-torture/compile/vector-2.c: Likewise.
	* gcc.dg/pr32912-1.c: Likewise.
	* gcc.c-torture/execute/va-arg-25.c: Move ...
	* gcc.dg/torture/va-arg-25.c: ... here.
	Add dg-do run.
	Add dg-options -msse, dg-require-effective-target sse_runtime for
	for i?86-*-*, x86_64-*-*.
	* gcc.c-torture/execute/vector-1.c: Likewise.
	* gcc.c-torture/execute/vector-2.c: Likewise.
	* gcc.dg/tree-ssa/forwprop-5.c: Add -msse to dg-options for
	i?86-*-*, x86_64-*-*.
	* gcc.dg/tree-ssa/fre-vce-1.c: Likewise.
	* gcc.dg/tree-ssa/sra-4.c: Likewise.
	* gcc.dg/tree-ssa/vector-1.c: Likewise.
	* gcc.dg/tree-ssa/vector-2.c: Likewise.
	* gcc.target/i386/vect-args.c: Add -Wno-psabi to dg-options.

From-SVN: r166444

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 408a05408e25de50afbb9c337cd777059987d16f..ae81d678c70e9c7ccce5a8f2ef61f773aba491de 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2010-11-08  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+
+       * config/i386/i386.c (ix86_function_arg_boundary): Fix warning
+       message.
 
 2010-11-08  Basile Starynkevitch  <basile@starynkevitch.net>
 

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index b4ba2c16627a114c2ff88492f55738350ea4e7c6..9efc0df689d07f0c16442df2df0ef8732d85f81d 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -7147,7 +7147,7 @@ ix86_function_arg_boundary (enum machine_mode mode, const_tree type)
        {
          warned = true;
          inform (input_location,
-                 "The ABI of passing parameter with %dbyte"
+                 "The ABI for passing parameters with %d-byte"
                  " alignment has changed in GCC 4.6",
                  align / BITS_PER_UNIT);
        }

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 600f768a35d37c85a27fa1379789a4f89040bb35..74d974b63cc365705d04f4585233b74db030e015 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,33 @@
+2010-11-08  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+
+       * gcc.dg/pr35442.c: Adapt warning.
+
+       PR target/46280
+       * g++.dg/eh/simd-2.C: Add -msse to dg-options, add
+       dg-require-effective-target sse_runtime for for i?86-*-*, x86_64-*-*.
+       * g++.dg/torture/pr36444.C: Add dg-options -msse for
+       i?86-*-* x86_64-*-*.
+       * g++.dg/torture/pr36445.C: Likewise.
+       * gcc.c-torture/compile/pr34856.c: Likewise.
+       * gcc.c-torture/compile/pr39928-1.c: Likewise.
+       * gcc.c-torture/compile/vector-1.c: Likewise.
+       * gcc.c-torture/compile/vector-2.c: Likewise.
+       * gcc.dg/pr32912-1.c: Likewise.
+       * gcc.c-torture/execute/va-arg-25.c: Move ...
+       * gcc.dg/torture/va-arg-25.c: ... here.
+       Add dg-do run.
+       Add dg-options -msse, dg-require-effective-target sse_runtime for
+       for i?86-*-*, x86_64-*-*.
+       * gcc.c-torture/execute/vector-1.c: Likewise.
+       * gcc.c-torture/execute/vector-2.c: Likewise.
+       * gcc.dg/tree-ssa/forwprop-5.c: Add -msse to dg-options for
+       i?86-*-*, x86_64-*-*.
+       * gcc.dg/tree-ssa/fre-vce-1.c: Likewise.
+       * gcc.dg/tree-ssa/sra-4.c: Likewise.
+       * gcc.dg/tree-ssa/vector-1.c: Likewise.
+       * gcc.dg/tree-ssa/vector-2.c: Likewise.
+       * gcc.target/i386/vect-args.c: Add -Wno-psabi to dg-options.
+
 2010-11-08  Steve Ellcey  <sje@cup.hp.com>
 
        * gcc.dg/torture/pr45982.c: Add -std=c99

diff --git a/gcc/testsuite/g++.dg/eh/simd-2.C b/gcc/testsuite/g++.dg/eh/simd-2.C
index da7ef49512062356d15d07ab123370189e906ea3..2761061c178aa7f8593052966b7e11991bfed398 100644 (file)
--- a/gcc/testsuite/g++.dg/eh/simd-2.C
+++ b/gcc/testsuite/g++.dg/eh/simd-2.C
@@ -1,10 +1,11 @@
 // Test EH when V4SI SIMD registers are involved.
 // Contributed by Aldy Hernandez (aldy@quesejoda.com).
 // { dg-options "-O -Wno-abi" }
-// { dg-options "-O -w" { target { { i?86-*-* x86_64-*-* } && ilp32 } } }
+// { dg-options "-O -w -msse" { target { { i?86-*-* x86_64-*-* } && ilp32 } } }
 // { dg-options "-O -w" { target powerpc*-*-* } }
 // { dg-options "-O -w -maltivec" { target { powerpc*-*-* && vmx_hw } } }
 // { dg-do run }
+// { dg-require-effective-target sse_runtime { target { { i?86-*-* x86_64-*-* } && ilp32 } } }
 
 #include "check-vect.h"
 

diff --git a/gcc/testsuite/g++.dg/torture/pr36444.C b/gcc/testsuite/g++.dg/torture/pr36444.C
index fd20bde3d47bdce7c93b6c383facc2eaa9e6550b..ae639e25d2c5928d0c3b476cb0fcee19ee866b80 100644 (file)
--- a/gcc/testsuite/g++.dg/torture/pr36444.C
+++ b/gcc/testsuite/g++.dg/torture/pr36444.C
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-options "-msse" { target { i?86-*-* x86_64-*-* } } } */
 #define vector __attribute__((vector_size(16) ))
 struct struct1  {
   union {}    vmx;

diff --git a/gcc/testsuite/g++.dg/torture/pr36445.C b/gcc/testsuite/g++.dg/torture/pr36445.C
index 39a7a553afd0f56835ad68951dcdbddfee2ceafd..56642e9ec73969069e9e3fa940baf38467adcca1 100644 (file)
--- a/gcc/testsuite/g++.dg/torture/pr36445.C
+++ b/gcc/testsuite/g++.dg/torture/pr36445.C
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-options "-msse" { target { i?86-*-* x86_64-*-* } } } */
 // This used to fail as we would try to expand a VCE where one side had
 // a mode of BLKmode and the other side was a vector mode.
 #define vector __attribute__((vector_size(16) ))

diff --git a/gcc/testsuite/gcc.c-torture/compile/pr34856.c b/gcc/testsuite/gcc.c-torture/compile/pr34856.c
index a2f43690990d875c2fe85b99d3dd761eaa098fc3..7b0d5962a60d6ff117d07b429a70f8ea68db1e4c 100644 (file)
--- a/gcc/testsuite/gcc.c-torture/compile/pr34856.c
+++ b/gcc/testsuite/gcc.c-torture/compile/pr34856.c
@@ -1,3 +1,4 @@
+/* { dg-options "-msse" { target { i?86-*-* x86_64-*-* } } } */
 #undef __vector
 #define __vector __attribute__((vector_size(16) ))
 typedef __vector signed char qword;

diff --git a/gcc/testsuite/gcc.c-torture/compile/pr39928-1.c b/gcc/testsuite/gcc.c-torture/compile/pr39928-1.c
index 3bee4380e5b59ba8cba1140d2e9f264243e75b67..1abb5ccb505dcbc447aca86e1936eca35193ba13 100644 (file)
--- a/gcc/testsuite/gcc.c-torture/compile/pr39928-1.c
+++ b/gcc/testsuite/gcc.c-torture/compile/pr39928-1.c
@@ -1,3 +1,4 @@
+/* { dg-options "-msse" { target { i?86-*-* x86_64-*-* } } } */
 typedef float __m128 __attribute__ ((__vector_size__ (16), __may_alias__));
 extern __m128 _mm_sub_ps (__m128 __A, __m128 __B);
 extern __m128 _mm_mul_ps (__m128 __A, __m128 __B);

diff --git a/gcc/testsuite/gcc.c-torture/compile/vector-1.c b/gcc/testsuite/gcc.c-torture/compile/vector-1.c
index d22afd55df5593a485902aa8b2277a85c428e69b..9be0be19bcaabebfaa11daeac3464d7ecc38419a 100644 (file)
--- a/gcc/testsuite/gcc.c-torture/compile/vector-1.c
+++ b/gcc/testsuite/gcc.c-torture/compile/vector-1.c
@@ -1,3 +1,4 @@
+/* { dg-options "-msse" { target { i?86-*-* x86_64-*-* } } } */
 #define vector __attribute__((vector_size(16) ))
 struct ss
 {

diff --git a/gcc/testsuite/gcc.c-torture/compile/vector-2.c b/gcc/testsuite/gcc.c-torture/compile/vector-2.c
index 930a9c1f8707e5ad3a8abd52c7e6e67c0c3dcb3f..e04d55588e5560ffbb82afc916b5257ffe81ae16 100644 (file)
--- a/gcc/testsuite/gcc.c-torture/compile/vector-2.c
+++ b/gcc/testsuite/gcc.c-torture/compile/vector-2.c
@@ -1,3 +1,4 @@
+/* { dg-options "-msse" { target { i?86-*-* x86_64-*-* } } } */
 #define vector __attribute__((vector_size(16) ))
 struct ss
 {

diff --git a/gcc/testsuite/gcc.dg/pr32912-1.c b/gcc/testsuite/gcc.dg/pr32912-1.c
index 1ceb77ad43cd8853b66b7b4ba2b559200b6f777f..4fcc29a9cc8b185490855d296df28ba27c6a09a8 100644 (file)
--- a/gcc/testsuite/gcc.dg/pr32912-1.c
+++ b/gcc/testsuite/gcc.dg/pr32912-1.c
@@ -2,6 +2,8 @@
 /* { dg-do run } */
 /* { dg-options "-O2 -w" } */
 /* { dg-options "-O2 -w -fno-common" { target hppa*-*-hpux* } } */
+/* { dg-options "-O2 -w -msse" { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-require-effective-target sse_runtime { target { i?86-*-* x86_64-*-* } } } */
 
 extern void abort (void);
 

diff --git a/gcc/testsuite/gcc.dg/pr35442.c b/gcc/testsuite/gcc.dg/pr35442.c
index 875cb0b31b66e0c86994e1895ca08e0b479cb41b..206853b9ef044348f89a825264f97300c57735cc 100644 (file)
--- a/gcc/testsuite/gcc.dg/pr35442.c
+++ b/gcc/testsuite/gcc.dg/pr35442.c
@@ -11,4 +11,4 @@ foo (A a)
 }
 
 /* Ignore a warning that is irrelevant to the purpose of this test.  */
-/* { dg-prune-output "(.*GCC vector passed by reference.*|.*ABI of * passing parameter with.*)" } */
+/* { dg-prune-output "(.*GCC vector passed by reference.*|.*ABI for * passing parameters with.*)" } */

diff --git a/gcc/testsuite/gcc.c-torture/execute/va-arg-25.c b/gcc/testsuite/gcc.dg/torture/va-arg-25.c
similarity index 79%
rename from gcc/testsuite/gcc.c-torture/execute/va-arg-25.c
rename to gcc/testsuite/gcc.dg/torture/va-arg-25.c
index b9f3a1b1237fe86ba2010a5d3c91141c3f3164c5..8496460d28c293ea68ad06ac14ebf59b66e522c1 100644 (file)
--- a/gcc/testsuite/gcc.c-torture/execute/va-arg-25.c
+++ b/gcc/testsuite/gcc.dg/torture/va-arg-25.c
@@ -1,6 +1,11 @@
 /* Varargs and vectors!  */
 
+/* { dg-do run } */
+/* { dg-options "-msse" { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-require-effective-target sse_runtime { target { i?86-*-* x86_64-*-* } } } */
+
 #include <stdarg.h>
+#include <stdlib.h>
 #include <limits.h>
 
 #define vector __attribute__((vector_size(16)))

diff --git a/gcc/testsuite/gcc.c-torture/execute/vector-1.c b/gcc/testsuite/gcc.dg/torture/vector-1.c
similarity index 79%
rename from gcc/testsuite/gcc.c-torture/execute/vector-1.c
rename to gcc/testsuite/gcc.dg/torture/vector-1.c
index ff21d68ca7be8e7cab83b57bd495f1aa788739bb..9ab78aaf53e353e98ce16fc21c50324f2de89dd8 100644 (file)
--- a/gcc/testsuite/gcc.c-torture/execute/vector-1.c
+++ b/gcc/testsuite/gcc.dg/torture/vector-1.c
@@ -1,5 +1,9 @@
 /* Check that vector extraction works correctly. */
 
+/* { dg-do run } */
+/* { dg-options "-msse" { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-require-effective-target sse_runtime { target { i?86-*-* x86_64-*-* } } } */
+
 #define vector __attribute__((vector_size(16) ))
 
 int f0(vector int t)

diff --git a/gcc/testsuite/gcc.c-torture/execute/vector-2.c b/gcc/testsuite/gcc.dg/torture/vector-2.c
similarity index 84%
rename from gcc/testsuite/gcc.c-torture/execute/vector-2.c
rename to gcc/testsuite/gcc.dg/torture/vector-2.c
index 55330dd66060b8fe7841cfac39cd23ccbd30bba7..bff9f82cdad26879f3bf3f5ccb27ac9d4840dae3 100644 (file)
--- a/gcc/testsuite/gcc.c-torture/execute/vector-2.c
+++ b/gcc/testsuite/gcc.dg/torture/vector-2.c
@@ -1,5 +1,9 @@
 /* Check that vector insertion works correctly. */
 
+/* { dg-do run } */
+/* { dg-options "-msse" { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-require-effective-target sse_runtime { target { i?86-*-* x86_64-*-* } } } */
+
 #define vector __attribute__((vector_size(16) ))
 
 vector int f0(vector int t, int a)

diff --git a/gcc/testsuite/gcc.dg/tree-ssa/forwprop-5.c b/gcc/testsuite/gcc.dg/tree-ssa/forwprop-5.c
index f2ddab2535b9d0377b42c0803a278d7bb6cb894e..033c60dae0a1e9e237f5de7383e0091339d78b67 100644 (file)
--- a/gcc/testsuite/gcc.dg/tree-ssa/forwprop-5.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/forwprop-5.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O1 -fdump-tree-optimized -w" } */
+/* { dg-options "-O1 -fdump-tree-optimized -w -msse" { target { i?86-*-* x86_64-*-* } } } */
 
 #define vector __attribute__((vector_size(16) ))
 struct VecClass

diff --git a/gcc/testsuite/gcc.dg/tree-ssa/fre-vce-1.c b/gcc/testsuite/gcc.dg/tree-ssa/fre-vce-1.c
index 2442b93231ad5a1a6602dc9b491270d8b4ddb953..599d1f1efd50d125aaefc09d00d4f283f3948dfc 100644 (file)
--- a/gcc/testsuite/gcc.dg/tree-ssa/fre-vce-1.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/fre-vce-1.c
@@ -1,4 +1,5 @@
 /* { dg-options "-O2 -fdump-tree-fre -w" } */
+/* { dg-options "-O2 -fdump-tree-fre -w -msse" { target { i?86-*-* x86_64-*-* } } } */
 /* { dg-do compile } */
 #define vector __attribute__((vector_size(sizeof(int)*4) ))
 struct s { vector int i; };

diff --git a/gcc/testsuite/gcc.dg/tree-ssa/sra-4.c b/gcc/testsuite/gcc.dg/tree-ssa/sra-4.c
index 73a68f900434b6fc670d77c8c759e67687f8d2f0..e6ca7561f7f6ea4d4e51e3494930d2b22d89f8a8 100644 (file)
--- a/gcc/testsuite/gcc.dg/tree-ssa/sra-4.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/sra-4.c
@@ -1,6 +1,7 @@
 /* { dg-do compile } */
 /* { dg-options "-O1 -fdump-tree-optimized -w" } */
-/* Check that SRA replaces strucutres containing vectors. */
+/* { dg-options "-O1 -fdump-tree-optimized -w -msse" { target { i?86-*-* x86_64-*-* } } } */
+/* Check that SRA replaces structures containing vectors. */
 
 #define vector __attribute__((vector_size(16)))
 

diff --git a/gcc/testsuite/gcc.dg/tree-ssa/vector-1.c b/gcc/testsuite/gcc.dg/tree-ssa/vector-1.c
index 5b07c67a2c65284fbc21f6ee72cfb17ad8f6f3fa..6fe0e872bb9845d70e043fc588055b6904c080c7 100644 (file)
--- a/gcc/testsuite/gcc.dg/tree-ssa/vector-1.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/vector-1.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-w -O1 -fdump-tree-gimple" } */
+/* { dg-options "-w -O1 -fdump-tree-gimple -msse" { target { i?86-*-* x86_64-*-* } } } */
 
 
 /* We should be able to produce a BIT_FIELD_REF for each of these vector access. */

diff --git a/gcc/testsuite/gcc.dg/tree-ssa/vector-2.c b/gcc/testsuite/gcc.dg/tree-ssa/vector-2.c
index cb680937a2fd637ca775bd1eaca739e651047c1b..e34532d3faa5422abce3d1f9ade4a5a99fc140b6 100644 (file)
--- a/gcc/testsuite/gcc.dg/tree-ssa/vector-2.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/vector-2.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-w -O1 -fdump-tree-optimized" } */
+/* { dg-options "-w -O1 -fdump-tree-optimized -msse" { target { i?86-*-* x86_64-*-* } } } */
 
 #define vector __attribute__(( vector_size(16) ))
 

diff --git a/gcc/testsuite/gcc.target/i386/vect-args.c b/gcc/testsuite/gcc.target/i386/vect-args.c
index 94b602d913a57a2417b974517e96ac28b803dc5e..fc458896ea1ad43fe4be78372e3530a2cfda39e6 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/vect-args.c
+++ b/gcc/testsuite/gcc.target/i386/vect-args.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-w" } */
+/* { dg-options "-w -Wno-psabi" } */
 
 /* SSE1 and SSE2 modes.  */
 typedef unsigned char V16QImode __attribute__((vector_size(16)));