drm/amdgpu/gfx: decouple the number of kgqs from the hw

The driver currently sets up one kgq per pipe.  As such
adev->gfx.me.num_queue_per_pipe is hardcoded to 1 everywhere.
This is fine for kernel queues, but when we enable user queues
we need to know that actual number of queues per pipe.  Decouple
the kgq setup from the actual hardware count.  For dev core
dumps and user queues, we want to know the actual number
of queues per pipe.

Reviewed-by: Sunil Khatri <sunil.khatri@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
index 04982b7f33a8ad99671f8b8c3554d4fdee1acf57..f64675b2ab752dbf4fc0141c9f92f30ea5f97ec3 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
@@ -77,11 +77,12 @@ bool amdgpu_gfx_is_mec_queue_enabled(struct amdgpu_device *adev,
 static int amdgpu_gfx_me_queue_to_bit(struct amdgpu_device *adev,
                                      int me, int pipe, int queue)
 {
+       int num_queue_per_pipe = 1; /* we only enable 1 KGQ per pipe */
        int bit = 0;
 
        bit += me * adev->gfx.me.num_pipe_per_me
-               * adev->gfx.me.num_queue_per_pipe;
-       bit += pipe * adev->gfx.me.num_queue_per_pipe;
+               * num_queue_per_pipe;
+       bit += pipe * num_queue_per_pipe;
        bit += queue;
 
        return bit;
@@ -238,8 +239,8 @@ void amdgpu_gfx_graphics_queue_acquire(struct amdgpu_device *adev)
 {
        int i, queue, pipe;
        bool multipipe_policy = amdgpu_gfx_is_graphics_multipipe_capable(adev);
-       int max_queues_per_me = adev->gfx.me.num_pipe_per_me *
-                                       adev->gfx.me.num_queue_per_pipe;
+       int num_queue_per_pipe = 1; /* we only enable 1 KGQ per pipe */
+       int max_queues_per_me = adev->gfx.me.num_pipe_per_me * num_queue_per_pipe;
 
        if (multipipe_policy) {
                /* policy: amdgpu owns the first queue per pipe at this stage
@@ -247,9 +248,9 @@ void amdgpu_gfx_graphics_queue_acquire(struct amdgpu_device *adev)
                for (i = 0; i < max_queues_per_me; i++) {
                        pipe = i % adev->gfx.me.num_pipe_per_me;
                        queue = (i / adev->gfx.me.num_pipe_per_me) %
-                               adev->gfx.me.num_queue_per_pipe;
+                               num_queue_per_pipe;
 
-                       set_bit(pipe * adev->gfx.me.num_queue_per_pipe + queue,
+                       set_bit(pipe * num_queue_per_pipe + queue,
                                adev->gfx.me.queue_bitmap);
                }
        } else {

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index d1c04de0f633d02c2a6e001408abaca25cb26966..cba9b973f0a767d5b19c5d7d6cf876ca7887843b 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -4752,6 +4752,7 @@ static int gfx_v10_0_sw_init(struct amdgpu_ip_block *ip_block)
        int i, j, k, r, ring_id = 0;
        int xcc_id = 0;
        struct amdgpu_device *adev = ip_block->adev;
+       int num_queue_per_pipe = 1; /* we only enable 1 KGQ per pipe */
 
        INIT_DELAYED_WORK(&adev->gfx.idle_work, amdgpu_gfx_profile_idle_work_handler);
 
@@ -4916,7 +4917,7 @@ static int gfx_v10_0_sw_init(struct amdgpu_ip_block *ip_block)
 
        /* set up the gfx ring */
        for (i = 0; i < adev->gfx.me.num_me; i++) {
-               for (j = 0; j < adev->gfx.me.num_queue_per_pipe; j++) {
+               for (j = 0; j < num_queue_per_pipe; j++) {
                        for (k = 0; k < adev->gfx.me.num_pipe_per_me; k++) {
                                if (!amdgpu_gfx_is_me_queue_enabled(adev, i, k, j))
                                        continue;

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index d57db42f9536008494874fbf510d607ed6321a74..0c9b28a4605031751820106f3dacf7a1cbb291a0 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -1571,6 +1571,7 @@ static int gfx_v11_0_sw_init(struct amdgpu_ip_block *ip_block)
        int i, j, k, r, ring_id = 0;
        int xcc_id = 0;
        struct amdgpu_device *adev = ip_block->adev;
+       int num_queue_per_pipe = 1; /* we only enable 1 KGQ per pipe */
 
        INIT_DELAYED_WORK(&adev->gfx.idle_work, amdgpu_gfx_profile_idle_work_handler);
 
@@ -1703,7 +1704,7 @@ static int gfx_v11_0_sw_init(struct amdgpu_ip_block *ip_block)
 
        /* set up the gfx ring */
        for (i = 0; i < adev->gfx.me.num_me; i++) {
-               for (j = 0; j < adev->gfx.me.num_queue_per_pipe; j++) {
+               for (j = 0; j < num_queue_per_pipe; j++) {
                        for (k = 0; k < adev->gfx.me.num_pipe_per_me; k++) {
                                if (!amdgpu_gfx_is_me_queue_enabled(adev, i, k, j))
                                        continue;

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
index e7b58e470292717279b9d72e60744e4d5bab95d7..7b20ab48f762bb1cbd1e6365ece92c0bae2c56b8 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
@@ -1346,6 +1346,7 @@ static int gfx_v12_0_sw_init(struct amdgpu_ip_block *ip_block)
        unsigned num_compute_rings;
        int xcc_id = 0;
        struct amdgpu_device *adev = ip_block->adev;
+       int num_queue_per_pipe = 1; /* we only enable 1 KGQ per pipe */
 
        INIT_DELAYED_WORK(&adev->gfx.idle_work, amdgpu_gfx_profile_idle_work_handler);
 
@@ -1435,7 +1436,7 @@ static int gfx_v12_0_sw_init(struct amdgpu_ip_block *ip_block)
 
        /* set up the gfx ring */
        for (i = 0; i < adev->gfx.me.num_me; i++) {
-               for (j = 0; j < adev->gfx.me.num_queue_per_pipe; j++) {
+               for (j = 0; j < num_queue_per_pipe; j++) {
                        for (k = 0; k < adev->gfx.me.num_pipe_per_me; k++) {
                                if (!amdgpu_gfx_is_me_queue_enabled(adev, i, k, j))
                                        continue;