]> git.ipfire.org Git - thirdparty/qemu.git/commitdiff
tcg/loongarch64: Do not accept constant argument to nor
authorRichard Henderson <richard.henderson@linaro.org>
Tue, 7 Jan 2025 04:37:25 +0000 (20:37 -0800)
committerRichard Henderson <richard.henderson@linaro.org>
Mon, 28 Apr 2025 20:40:15 +0000 (13:40 -0700)
The instruction set does not implement nor with immediate.
There is no reason to pretend that we do.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
tcg/loongarch64/tcg-target.c.inc

index 814596608af7185f896467d7416157aa465b6988..e74c7d8a871cfc6375d266ff671264b11c25c62c 100644 (file)
@@ -1425,12 +1425,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, TCGType type,
 
     case INDEX_op_nor_i32:
     case INDEX_op_nor_i64:
-        if (c2) {
-            tcg_out_opc_ori(s, a0, a1, a2);
-            tcg_out_opc_nor(s, a0, a0, TCG_REG_ZERO);
-        } else {
-            tcg_out_opc_nor(s, a0, a1, a2);
-        }
+        tcg_out_opc_nor(s, a0, a1, a2);
         break;
 
     case INDEX_op_extract_i32:
@@ -2314,8 +2309,7 @@ tcg_target_op_def(TCGOpcode op, TCGType type, unsigned flags)
 
     case INDEX_op_nor_i32:
     case INDEX_op_nor_i64:
-        /* LoongArch reg-imm bitops have their imms ZERO-extended */
-        return C_O1_I2(r, r, rU);
+        return C_O1_I2(r, r, r);
 
     case INDEX_op_clz_i32:
     case INDEX_op_clz_i64: