]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
drm: i915: Change fault type to unsigned long
authorVincenzo Frascino <vincenzo.frascino@arm.com>
Mon, 14 Oct 2024 15:13:38 +0000 (16:13 +0100)
committerThomas Gleixner <tglx@linutronix.de>
Tue, 15 Oct 2024 22:13:04 +0000 (00:13 +0200)
Fault is currently of type u32 and with the introduction of the
generalized vdso/page.h we trigger the error below:

drivers/gpu/drm/i915/gt/intel_gt_print.h:29:36: error: format ‘%lx’ expects
argument of type ‘long unsigned int’, but argument 6 has type ‘u32’ {aka
‘unsigned int’} [-Werror=format=]
   29 |         drm_dbg(&(_gt)->i915->drm, "GT%u: " _fmt, (_gt)->info.id,
      |                                    ^~~~~~~~
include/drm/drm_print.h:424:39: note: in definition of macro ‘drm_dev_dbg’
  424 |         __drm_dev_dbg(NULL, dev, cat, fmt, ##__VA_ARGS__)
      |                                       ^~~
include/drm/drm_print.h:524:33: note: in expansion of macro ‘drm_dbg_driver’
  524 | #define drm_dbg(drm, fmt, ...)  drm_dbg_driver(drm, fmt, ##__VA_ARGS__)
      |                                 ^~~~~~~~~~~~~~
linux/drivers/gpu/drm/i915/gt/intel_gt_print.h:29:9: note: in expansion of macro
‘drm_dbg’
   29 |         drm_dbg(&(_gt)->i915->drm, "GT%u: " _fmt, (_gt)->info.id,
      |         ^~~~~~~
drivers/gpu/drm/i915/gt/intel_gt.c:310:25: note: in expansion of macro ‘gt_dbg’
  310 |                         gt_dbg(gt, "Unexpected fault\n"
      |                         ^~~~~~

This happens because the type of PAGE_MASK depends on the architecture.

Prevent the compilation error changing the 'fault' type to unsigned
long.

Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/all/20241014151340.1639555-2-vincenzo.frascino@arm.com
drivers/gpu/drm/i915/gt/intel_gt.c

index a6c69a706fd76ab8852128e44749939e40de072c..bb29f361110e8f0b230659794f48936e876567d9 100644 (file)
@@ -302,7 +302,7 @@ static void gen6_check_faults(struct intel_gt *gt)
 {
        struct intel_engine_cs *engine;
        enum intel_engine_id id;
-       u32 fault;
+       unsigned long fault;
 
        for_each_engine(engine, gt, id) {
                fault = GEN6_RING_FAULT_REG_READ(engine);
@@ -310,8 +310,8 @@ static void gen6_check_faults(struct intel_gt *gt)
                        gt_dbg(gt, "Unexpected fault\n"
                               "\tAddr: 0x%08lx\n"
                               "\tAddress space: %s\n"
-                              "\tSource ID: %d\n"
-                              "\tType: %d\n",
+                              "\tSource ID: %ld\n"
+                              "\tType: %ld\n",
                               fault & PAGE_MASK,
                               fault & RING_FAULT_GTTSEL_MASK ?
                               "GGTT" : "PPGTT",