ARM: dts: qcom: minor whitespace cleanup

The DTS code coding style expects exactly one space around '=' or '{'
characters.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konradybcio@kernel.org>
Link: https://lore.kernel.org/r/20240905-dts-cleanup-v1-2-f4c5f7b2c8c2@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dts b/arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dts
index ac3b30072a22718ae1e129f79abfeb41af2bed7c..6640ea7b6acb2f1d3002b52b25ef327cdc8a5bdd 100644 (file)
--- a/arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dts
+++ b/arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dts
@@ -25,7 +25,7 @@
                };
        };
 
-       serial_pins: serial-state{
+       serial_pins: serial-state {
                pins = "gpio60", "gpio61";
                function = "blsp_uart0";
                bias-disable;

diff --git a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
index a949454212e942755fa3ca228bd0bfc2e8ee6ce2..9354896da6e62c6e68486762ba6c37f0d5dd33e5 100644 (file)
--- a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
@@ -592,39 +592,39 @@
                        reg = <0x15000000 0x40000>;
                        #iommu-cells = <2>;
                        #global-interrupts = <1>;
-                       interrupts =    <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
-                                       <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;
                };
 
                intc: interrupt-controller@17800000 {