Daily bump.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 586ad24a8f3c4059461983d2887ca668924f0953..1018b0e17eef769e71b89df361028a343afc364f 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,80 @@
+2024-02-08  Aldy Hernandez  <aldyh@redhat.com>
+
+       PR tree-optimization/113735
+       * value-relation.cc (equiv_oracle::add_equiv_to_block): Call
+       limit_check().
+
+2024-02-08  Georg-Johann Lay  <avr@gjlay.de>
+
+       * config/avr/gen-avr-mmcu-specs.cc (struct McuInfo): New.
+       (main, print_mcu, diagnose_mrodata_in_ram): Pass it down.
+
+2024-02-08  H.J. Lu  <hjl.tools@gmail.com>
+
+       PR target/113711
+       PR target/113733
+       * config/i386/constraints.md: List all constraints with j prefix.
+       (j>): Change auto-dec to auto-inc in documentation.
+       (je): Changed to a memory constraint with APX NDD TLS operand
+       check.
+       (jM): New memory constraint for APX NDD instructions.
+       (jO): Likewise.
+       * config/i386/i386-protos.h (x86_poff_operand_p): Removed.
+       * config/i386/i386.cc (x86_poff_operand_p): Likewise.
+       * config/i386/i386.md (*add<dwi>3_doubleword): Use rjO.
+       (*add<mode>_1[SWI48]): Use je and jM.
+       (addsi_1_zext): Use jM.
+       (*addv<dwi>4_doubleword_1[DWI]): Likewise.
+       (*sub<mode>_1[SWI]): Use jM.
+       (@add<mode>3_cc_overflow_1[SWI]): Likewise.
+       (*add<dwi>3_doubleword_cc_overflow_1): Use rjO.
+       (*and<dwi>3_doubleword): Likewise.
+       (*anddi_1): Use jM.
+       (*andsi_1_zext): Likewise.
+       (*and<mode>_1[SWI24]): Likewise.
+       (*<code><dwi>3_doubleword[any_or]): Use rjO
+       (*code<mode>_1[any_or SWI248]): Use jM.
+       (*<code>si_1_zext[zero_extend + any_or]): Likewise.
+       * config/i386/predicates.md (apx_ndd_memory_operand): New.
+       (apx_ndd_add_memory_operand): Likewise.
+
+2024-02-08  Georg-Johann Lay  <avr@gjlay.de>
+
+       PR target/113824
+       * config/avr/avr-mcus.def (ata5797): Move from avr5 to avr4.
+       * doc/avr-mmcu.texi: Rebuild.
+
+2024-02-08  Tamar Christina  <tamar.christina@arm.com>
+
+       PR tree-optimization/113808
+       * tree-vect-loop.cc (vectorizable_live_operation): Don't cache the
+       value cross iterations.
+
+2024-02-08  Georg-Johann Lay  <avr@gjlay.de>
+
+       * config/avr/gen-avr-mmcu-specs.cc (print_mcu) <*cpp_mcu>: Spec always
+       defines __AVR_PM_BASE_ADDRESS__ if the core has it.
+
+2024-02-08  Richard Biener  <rguenther@suse.de>
+
+       * tree-vect-data-refs.cc (vect_analyze_early_break_dependences):
+       Revert last change to dr_may_alias_p.
+
+2024-02-08  Georg-Johann Lay  <avr@gjlay.de>
+
+       * config/avr/gen-avr-mmcu-specs.cc: Rename spec cc1_misc to
+       cc1_rodata_in_ram.  Rename spec link_misc to link_rodata_in_ram.
+       Remove spec asm_misc.
+       * config/avr/specs.h: Same.
+
+2024-02-08  Pan Li  <pan2.li@intel.com>
+
+       PR target/113766
+       * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Make
+       sure the c.arg_num is >= 2 before checking.
+       (struct build_frm_base): Ditto.
+       (struct narrow_alu_def): Ditto.
+
 2024-02-07  Richard Biener  <rguenther@suse.de>
 
        PR tree-optimization/113796

diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 2871f27b71dedc765d63d8fcc48e54befee337e4..9622c04647db2b53d0d5544792b69dfa8c4a5d2b 100644 (file)
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20240208
+20240209

diff --git a/gcc/c/ChangeLog b/gcc/c/ChangeLog
index 002bf415b15cff7c281c4c8dfccccaabf327057e..6f4f0c7da9cd1d10ef3eaaa827365ad9df3f8847 100644 (file)
--- a/gcc/c/ChangeLog
+++ b/gcc/c/ChangeLog
@@ -1,3 +1,10 @@
+2024-02-08  Joseph Myers  <josmyers@redhat.com>
+
+       PR c/113776
+       * c-typeck.cc (c_objc_common_truthvalue_conversion): Return an
+       integer constant expression for boolean conversion of floating
+       constant.
+
 2024-02-05  Jakub Jelinek  <jakub@redhat.com>
 
        PR c/113740

diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index 8a63a366ee1079748a84b048dcc7dae5ca599132..9f8ef7b09d42f511f6e4fffd42187cf31c104048 100644 (file)
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,15 @@
+2024-02-08  Patrick Palka  <ppalka@redhat.com>
+
+       PR c++/113649
+       * pt.cc (do_class_deduction): Add outer_targs parameter.
+       Substitute outer arguments into the CTAD template.
+       (do_auto_deduction): Pass outer_targs to do_class_deduction.
+
+2024-02-08  Jason Merrill  <jason@redhat.com>
+
+       * pt.cc (create_template_parm_object): Pass TARGET_EXPR to
+       cxx_constant_value.
+
 2024-02-06  Jakub Jelinek  <jakub@redhat.com>
 
        PR c++/113788

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index f238648d79de9e8a76995210336f7b0260a189ab..9ffdfcb7ef5a7d42f2984b0a52c2a384230985db 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,97 @@
+2024-02-08  Edwin Lu  <ewlu@rivosinc.com>
+
+       * gcc.target/riscv/rvv/base/abi-1.c: change selector
+       * gcc.target/riscv/rvv/base/pragma-2.c: ditto
+       * gcc.target/riscv/rvv/base/pragma-3.c: ditto
+
+2024-02-08  Richard Earnshaw  <rearnsha@arm.com>
+
+       * lib/target-supports.exp
+       (check_effective_target_arm_fp16_alternative_ok_nocache): Use
+       et_arm_fp16_alternative_flags to cache the result.  Improve test
+       for FP16 availability.
+       (add_options_for_arm_fp16_alternative): Use
+       et_arm_fp16_alternative_flags.
+       * g++.dg/ext/arm-fp16/arm-fp16-ops-3.C: Update dg-* flags.
+       * g++.dg/ext/arm-fp16/arm-fp16-ops-4.C: Likewise.
+       * gcc.dg/torture/arm-fp16-int-convert-alt.c: Likewise.
+       * gcc.dg/torture/arm-fp16-ops-3.c: Likewise.
+       * gcc.dg/torture/arm-fp16-ops-4.c: Likewise.
+       * gcc.target/arm/fp16-aapcs-3.c: Likewise.
+       * gcc.target/arm/fp16-aapcs-4.c: Likewise.
+       * gcc.target/arm/fp16-compile-alt-1.c: Likewise.
+       * gcc.target/arm/fp16-compile-alt-10.c: Likewise.
+       * gcc.target/arm/fp16-compile-alt-11.c: Likewise.
+       * gcc.target/arm/fp16-compile-alt-12.c: Likewise.
+       * gcc.target/arm/fp16-compile-alt-2.c: Likewise.
+       * gcc.target/arm/fp16-compile-alt-3.c: Likewise.
+       * gcc.target/arm/fp16-compile-alt-4.c: Likewise.
+       * gcc.target/arm/fp16-compile-alt-5.c: Likewise.
+       * gcc.target/arm/fp16-compile-alt-6.c: Likewise.
+       * gcc.target/arm/fp16-compile-alt-7.c: Likewise.
+       * gcc.target/arm/fp16-compile-alt-8.c: Likewise.
+       * gcc.target/arm/fp16-compile-alt-9.c: Likewise.
+       * gcc.target/arm/fp16-rounding-alt-1.c: Likewise.
+
+2024-02-08  Patrick Palka  <ppalka@redhat.com>
+
+       PR c++/113649
+       * g++.dg/cpp2a/nontype-class65.C: New test.
+
+2024-02-08  Aldy Hernandez  <aldyh@redhat.com>
+
+       PR tree-optimization/113735
+       * gcc.dg/tree-ssa/pr113735.c: New test.
+
+2024-02-08  H.J. Lu  <hjl.tools@gmail.com>
+
+       PR target/113711
+       PR target/113733
+       * gcc.target/i386/apx-ndd-2.c: New test.
+       * gcc.target/i386/apx-ndd-base-index-1.c: Likewise.
+       * gcc.target/i386/apx-ndd-no-seg-global-1.c: Likewise.
+       * gcc.target/i386/apx-ndd-seg-1.c: Likewise.
+       * gcc.target/i386/apx-ndd-seg-2.c: Likewise.
+       * gcc.target/i386/apx-ndd-seg-3.c: Likewise.
+       * gcc.target/i386/apx-ndd-seg-4.c: Likewise.
+       * gcc.target/i386/apx-ndd-seg-5.c: Likewise.
+       * gcc.target/i386/apx-ndd-tls-1a.c: Likewise.
+       * gcc.target/i386/apx-ndd-tls-2.c: Likewise.
+       * gcc.target/i386/apx-ndd-tls-3.c: Likewise.
+       * gcc.target/i386/apx-ndd-tls-4.c: Likewise.
+       * gcc.target/i386/apx-ndd-x32-1.c: Likewise.
+
+2024-02-08  Tamar Christina  <tamar.christina@arm.com>
+
+       PR tree-optimization/113808
+       * gfortran.dg/vect/vect-early-break_1-PR113808.f90: Moved to...
+       * gfortran.dg/vect/vect-early-break_1-pr113808.f90: ...here.
+
+2024-02-08  Tamar Christina  <tamar.christina@arm.com>
+
+       PR tree-optimization/113808
+       * gfortran.dg/vect/vect-early-break_1-PR113808.f90: New test.
+
+2024-02-08  Tamar Christina  <tamar.christina@arm.com>
+
+       * gcc.dg/vect/vect-early-break_110-pr113467.c: Change unsigned long *
+       to uint64_t *.
+
+2024-02-08  Pan Li  <pan2.li@intel.com>
+
+       PR target/113766
+       * gcc.target/riscv/rvv/base/pr113766-1.c: Add new cases.
+
+2024-02-08  Joseph Myers  <josmyers@redhat.com>
+
+       PR c/113776
+       * gcc.dg/pr113776-1.c, gcc.dg/pr113776-2.c, gcc.dg/pr113776-3.c,
+       gcc.dg/pr113776-4.c: New tests.
+
+2024-02-08  Jason Merrill  <jason@redhat.com>
+
+       * g++.dg/cpp2a/nontype-class64.C: New test.
+
 2024-02-07  Richard Biener  <rguenther@suse.de>
 
        PR tree-optimization/113796

diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog
index 57a58d8c13c636ec3f4e9d7c83e01473f12e7a04..2dc435e044cb473a692769034dcd8b49862b0705 100644 (file)
--- a/libstdc++-v3/ChangeLog
+++ b/libstdc++-v3/ChangeLog
@@ -1,3 +1,18 @@
+2024-02-08  Jonathan Wakely  <jwakely@redhat.com>
+
+       * include/bits/shared_ptr_atomic.h: Fix typo in comment.
+
+2024-02-08  Jonathan Wakely  <jwakely@redhat.com>
+
+       PR libstdc++/100147
+       * include/bits/gslice.h (operator=): Add comment about lack of
+       self-assignment check.
+
+2024-02-08  Jonathan Wakely  <jwakely@redhat.com>
+
+       * include/tr2/type_traits (bases, direct_bases): Use
+       __has_builtin to check if required built-ins are supported.
+
 2024-02-07  Patrick Palka  <ppalka@redhat.com>
 
        PR testsuite/113710