]> git.ipfire.org Git - thirdparty/qemu.git/commitdiff
hw/ppc: Constify all Property
authorRichard Henderson <richard.henderson@linaro.org>
Fri, 13 Dec 2024 16:37:35 +0000 (16:37 +0000)
committerRichard Henderson <richard.henderson@linaro.org>
Sun, 15 Dec 2024 18:55:59 +0000 (12:55 -0600)
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
20 files changed:
hw/ppc/pnv.c
hw/ppc/pnv_adu.c
hw/ppc/pnv_chiptod.c
hw/ppc/pnv_core.c
hw/ppc/pnv_homer.c
hw/ppc/pnv_i2c.c
hw/ppc/pnv_lpc.c
hw/ppc/pnv_pnor.c
hw/ppc/pnv_psi.c
hw/ppc/ppc405_uc.c
hw/ppc/ppc440_uc.c
hw/ppc/ppc4xx_devs.c
hw/ppc/ppc4xx_sdram.c
hw/ppc/prep_systemio.c
hw/ppc/rs6000_mc.c
hw/ppc/spapr_cpu_core.c
hw/ppc/spapr_nvdimm.c
hw/ppc/spapr_pci.c
hw/ppc/spapr_rng.c
hw/ppc/spapr_tpm_proxy.c

index f0f0d7567da5b500c64b2f1ca831f07eb3b8b959..b90a052ce0d2cadae3e6ec6725d68a647e3e7728 100644 (file)
@@ -2422,7 +2422,7 @@ static void pnv_chip_realize(DeviceState *dev, Error **errp)
     }
 }
 
-static Property pnv_chip_properties[] = {
+static const Property pnv_chip_properties[] = {
     DEFINE_PROP_UINT32("chip-id", PnvChip, chip_id, 0),
     DEFINE_PROP_UINT64("ram-start", PnvChip, ram_start, 0),
     DEFINE_PROP_UINT64("ram-size", PnvChip, ram_size, 0),
index f636dedf79a25a734ba5d228d221e211c18074d0..646736f7e989edd3766cadebd1589e3f8325716d 100644 (file)
@@ -185,7 +185,7 @@ static void pnv_adu_realize(DeviceState *dev, Error **errp)
                           PNV9_XSCOM_ADU_SIZE);
 }
 
-static Property pnv_adu_properties[] = {
+static const Property pnv_adu_properties[] = {
     DEFINE_PROP_LINK("lpc", PnvADU, lpc, TYPE_PNV_LPC, PnvLpcController *),
     DEFINE_PROP_END_OF_LIST(),
 };
index 1e41fe557abd8a5abf4948903a0782977c3c8b24..840ef23128da5c8d986d599d5c29e3ea77b2928f 100644 (file)
@@ -450,7 +450,7 @@ static int pnv_chiptod_power9_dt_xscom(PnvXScomInterface *dev, void *fdt,
     return pnv_chiptod_dt_xscom(dev, fdt, xscom_offset, compat, sizeof(compat));
 }
 
-static Property pnv_chiptod_properties[] = {
+static const Property pnv_chiptod_properties[] = {
     DEFINE_PROP_BOOL("primary", PnvChipTOD, primary, false),
     DEFINE_PROP_BOOL("secondary", PnvChipTOD, secondary, false),
     DEFINE_PROP_LINK("chip", PnvChipTOD , chip, TYPE_PNV_CHIP, PnvChip *),
index e6b02294b1e70977470ea1a8dc35fa6c7c537e4a..22864c92f387093445888ce0ba31bd11d4371fa0 100644 (file)
@@ -435,7 +435,7 @@ static void pnv_core_unrealize(DeviceState *dev)
     g_free(pc->threads);
 }
 
-static Property pnv_core_properties[] = {
+static const Property pnv_core_properties[] = {
     DEFINE_PROP_UINT32("hwid", PnvCore, hwid, 0),
     DEFINE_PROP_UINT64("hrmor", PnvCore, hrmor, 0),
     DEFINE_PROP_BOOL("big-core", PnvCore, big_core, false),
@@ -693,7 +693,7 @@ static void pnv_quad_power10_realize(DeviceState *dev, Error **errp)
                           pqc->xscom_qme_size);
 }
 
-static Property pnv_quad_properties[] = {
+static const Property pnv_quad_properties[] = {
     DEFINE_PROP_UINT32("quad-id", PnvQuad, quad_id, 0),
     DEFINE_PROP_END_OF_LIST(),
 };
index f9a203d11d0dde1008b450b9787c218331a68ba4..b1f83e2cf27ac88a6fc71ac4924d8204338a7c7e 100644 (file)
@@ -412,7 +412,7 @@ static void pnv_homer_realize(DeviceState *dev, Error **errp)
                           hmrc->homer_size);
 }
 
-static Property pnv_homer_properties[] = {
+static const Property pnv_homer_properties[] = {
     DEFINE_PROP_LINK("chip", PnvHomer, chip, TYPE_PNV_CHIP, PnvChip *),
     DEFINE_PROP_END_OF_LIST(),
 };
index eec5047ce83f842108b53a6e2bd9869a81f14ac1..4bd61abeed95ec5c7903e36bdd089b64330f2d07 100644 (file)
@@ -543,7 +543,7 @@ static void pnv_i2c_realize(DeviceState *dev, Error **errp)
     qdev_init_gpio_out(DEVICE(dev), &i2c->psi_irq, 1);
 }
 
-static Property pnv_i2c_properties[] = {
+static const Property pnv_i2c_properties[] = {
     DEFINE_PROP_LINK("chip", PnvI2C, chip, TYPE_PNV_CHIP, PnvChip *),
     DEFINE_PROP_UINT32("engine", PnvI2C, engine, 1),
     DEFINE_PROP_UINT32("num-busses", PnvI2C, num_busses, 1),
index 8c203d20597470e03b8d305b02d6d812c895de5a..4d47167163060e8111b011c6f8600164644d7746 100644 (file)
@@ -828,7 +828,7 @@ static void pnv_lpc_realize(DeviceState *dev, Error **errp)
     qdev_init_gpio_out_named(dev, &lpc->psi_irq_lpchc, "LPCHC", 1);
 }
 
-static Property pnv_lpc_properties[] = {
+static const Property pnv_lpc_properties[] = {
     DEFINE_PROP_BOOL("psi-serirq", PnvLpcController, psi_has_serirq, false),
     DEFINE_PROP_END_OF_LIST(),
 };
index 62804082992f86e1fac4f68c88f98add534219cd..eed6d32650580123b2a5923aca102be4fb70c437 100644 (file)
@@ -112,7 +112,7 @@ static void pnv_pnor_realize(DeviceState *dev, Error **errp)
                           TYPE_PNV_PNOR, s->size);
 }
 
-static Property pnv_pnor_properties[] = {
+static const Property pnv_pnor_properties[] = {
     DEFINE_PROP_INT64("size", PnvPnor, size, 128 * MiB),
     DEFINE_PROP_DRIVE("drive", PnvPnor, blk),
     DEFINE_PROP_END_OF_LIST(),
index 37c56882b8502d07b22860c8073f9832d4ce52ec..e7d6ceee99e5042fc4c5d60160e23f04b094cd2c 100644 (file)
@@ -552,7 +552,7 @@ static int pnv_psi_dt_xscom(PnvXScomInterface *dev, void *fdt, int xscom_offset)
     return 0;
 }
 
-static Property pnv_psi_properties[] = {
+static const Property pnv_psi_properties[] = {
     DEFINE_PROP_UINT64("bar", PnvPsi, bar, 0),
     DEFINE_PROP_UINT64("fsp-bar", PnvPsi, fsp_bar, 0),
     DEFINE_PROP_END_OF_LIST(),
index 58cbd0507abc0c6a9db7e214be7238d1f922b971..801f97811f5852ff72b2742c5a8e9f2d9795777c 100644 (file)
@@ -965,7 +965,7 @@ static void ppc405_cpc_realize(DeviceState *dev, Error **errp)
                         &dcr_read_epcpc, &dcr_write_epcpc);
 }
 
-static Property ppc405_cpc_properties[] = {
+static const Property ppc405_cpc_properties[] = {
     DEFINE_PROP_UINT32("sys-clk", Ppc405CpcState, sysclk, 0),
     DEFINE_PROP_END_OF_LIST(),
 };
index 1312aa2080e97ebd7d55012ffec65f141973c0e7..05a5ef6f7732a17e587dc108aa6620df3238b11d 100644 (file)
@@ -1020,7 +1020,7 @@ static void ppc460ex_pcie_realize(DeviceState *dev, Error **errp)
     ppc460ex_pcie_register_dcrs(s);
 }
 
-static Property ppc460ex_pcie_props[] = {
+static const Property ppc460ex_pcie_props[] = {
     DEFINE_PROP_INT32("busnum", PPC460EXPCIEState, num, -1),
     DEFINE_PROP_INT32("dcrn-base", PPC460EXPCIEState, dcrn_base, -1),
     DEFINE_PROP_LINK("cpu", PPC460EXPCIEState, cpu, TYPE_POWERPC_CPU,
index db8f6b949750d523d8d3dd8d14ee0f0638f6aa78..530a392f2a0dda440ef47511d31c99bf4364a64e 100644 (file)
@@ -231,7 +231,7 @@ static void ppc4xx_mal_finalize(Object *obj)
     g_free(mal->txctpr);
 }
 
-static Property ppc4xx_mal_properties[] = {
+static const Property ppc4xx_mal_properties[] = {
     DEFINE_PROP_UINT8("txc-num", Ppc4xxMalState, txcnum, 0),
     DEFINE_PROP_UINT8("rxc-num", Ppc4xxMalState, rxcnum, 0),
     DEFINE_PROP_END_OF_LIST(),
@@ -539,7 +539,7 @@ bool ppc4xx_dcr_realize(Ppc4xxDcrDeviceState *dev, PowerPCCPU *cpu,
     return sysbus_realize(SYS_BUS_DEVICE(dev), errp);
 }
 
-static Property ppc4xx_dcr_properties[] = {
+static const Property ppc4xx_dcr_properties[] = {
     DEFINE_PROP_LINK("cpu", Ppc4xxDcrDeviceState, cpu, TYPE_POWERPC_CPU,
                      PowerPCCPU *),
     DEFINE_PROP_END_OF_LIST(),
index 2ee21f1ca76c097558db7fad8f5474223ee03cf6..6cfb07a11fdef92eb94ba2f17b4851f547e2d298 100644 (file)
@@ -425,7 +425,7 @@ static void ppc4xx_sdram_ddr_realize(DeviceState *dev, Error **errp)
                         s, &sdram_ddr_dcr_read, &sdram_ddr_dcr_write);
 }
 
-static Property ppc4xx_sdram_ddr_props[] = {
+static const Property ppc4xx_sdram_ddr_props[] = {
     DEFINE_PROP_LINK("dram", Ppc4xxSdramDdrState, dram_mr, TYPE_MEMORY_REGION,
                      MemoryRegion *),
     DEFINE_PROP_UINT32("nbanks", Ppc4xxSdramDdrState, nbanks, 4),
@@ -710,7 +710,7 @@ static void ppc4xx_sdram_ddr2_realize(DeviceState *dev, Error **errp)
                         s, &sdram_ddr2_dcr_read, &sdram_ddr2_dcr_write);
 }
 
-static Property ppc4xx_sdram_ddr2_props[] = {
+static const Property ppc4xx_sdram_ddr2_props[] = {
     DEFINE_PROP_LINK("dram", Ppc4xxSdramDdr2State, dram_mr, TYPE_MEMORY_REGION,
                      MemoryRegion *),
     DEFINE_PROP_UINT32("nbanks", Ppc4xxSdramDdr2State, nbanks, 4),
index 4d3a251ed823a3a9facb706f212c18f88eb566e3..ca475c69f4557717cfb15587764620869ce2e955 100644 (file)
@@ -285,7 +285,7 @@ static const VMStateDescription vmstate_prep_systemio = {
     },
 };
 
-static Property prep_systemio_properties[] = {
+static const Property prep_systemio_properties[] = {
     DEFINE_PROP_UINT8("ibm-planar-id", PrepSystemIoState, ibm_planar_id, 0),
     DEFINE_PROP_UINT8("equipment", PrepSystemIoState, equipment, 0),
     DEFINE_PROP_END_OF_LIST()
index 07b0b664d985b79037e06be3e0fbd8dc03c382ce..bee9bc62d46f3910a2c4648757b78977f0fb32c9 100644 (file)
@@ -207,7 +207,7 @@ static const VMStateDescription vmstate_rs6000mc = {
     },
 };
 
-static Property rs6000mc_properties[] = {
+static const Property rs6000mc_properties[] = {
     DEFINE_PROP_UINT32("ram-size", RS6000MCState, ram_size, 0),
     DEFINE_PROP_BOOL("auto-configure", RS6000MCState, autoconfigure, true),
     DEFINE_PROP_END_OF_LIST()
index 135f86a62227ca4ca29a1719d75ede668c59a1b2..88d743a3c3fd30d2c34a04be34a776de4d3f819e 100644 (file)
@@ -361,7 +361,7 @@ static void spapr_cpu_core_realize(DeviceState *dev, Error **errp)
     }
 }
 
-static Property spapr_cpu_core_properties[] = {
+static const Property spapr_cpu_core_properties[] = {
     DEFINE_PROP_INT32("node-id", SpaprCpuCore, node_id, CPU_UNSET_NUMA_NODE_ID),
     DEFINE_PROP_END_OF_LIST()
 };
index 7d2dfe5e3d2f725ecbf69467df583b550bd29713..2ef6f29f3dd484b693ca25aebbd659545b5bb72f 100644 (file)
@@ -884,7 +884,7 @@ static void spapr_nvdimm_unrealize(NVDIMMDevice *dimm)
     vmstate_unregister(NULL, &vmstate_spapr_nvdimm_states, dimm);
 }
 
-static Property spapr_nvdimm_properties[] = {
+static const Property spapr_nvdimm_properties[] = {
 #ifdef CONFIG_LIBPMEM
     DEFINE_PROP_BOOL("pmem-override", SpaprNVDIMMDevice, pmem_override, false),
 #endif
index 7e24084673fbebd1c4c0205efd614be4a6ed1bc2..3edff528ca121e15587a4c04b2c128de07ea6cd6 100644 (file)
@@ -2033,7 +2033,7 @@ static void spapr_phb_reset(DeviceState *qdev)
     g_hash_table_remove_all(sphb->msi);
 }
 
-static Property spapr_phb_properties[] = {
+static const Property spapr_phb_properties[] = {
     DEFINE_PROP_UINT32("index", SpaprPhbState, index, -1),
     DEFINE_PROP_UINT64("mem_win_size", SpaprPhbState, mem_win_size,
                        SPAPR_PCI_MEM32_WIN_SIZE),
index c2fda7ad2094afe9ff7c93da661104a13e918289..51c3a54d45d47a7655697383ffe85c60bff4a07a 100644 (file)
@@ -130,7 +130,7 @@ static void spapr_rng_realize(DeviceState *dev, Error **errp)
     }
 }
 
-static Property spapr_rng_properties[] = {
+static const Property spapr_rng_properties[] = {
     DEFINE_PROP_BOOL("use-kvm", SpaprRngState, use_kvm, false),
     DEFINE_PROP_LINK("rng", SpaprRngState, backend, TYPE_RNG_BACKEND,
                      RngBackend *),
index e10af35a1850444745390002a1440625b8dc66f0..37521b88cbb6c86f2da9502f99f2c47b420b2713 100644 (file)
@@ -145,7 +145,7 @@ static void spapr_tpm_proxy_unrealize(DeviceState *d)
     qemu_unregister_reset(spapr_tpm_proxy_reset, tpm_proxy);
 }
 
-static Property spapr_tpm_proxy_properties[] = {
+static const Property spapr_tpm_proxy_properties[] = {
     DEFINE_PROP_STRING("host-path", SpaprTpmProxy, host_path),
     DEFINE_PROP_END_OF_LIST(),
 };