]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
soc: fsl: cpm1: qmc: Add support for disabling channel TSA entries
authorHerve Codina <herve.codina@bootlin.com>
Tue, 5 Dec 2023 15:21:09 +0000 (16:21 +0100)
committerHerve Codina <herve.codina@bootlin.com>
Tue, 12 Dec 2023 09:29:20 +0000 (10:29 +0100)
In order to allow runtime timeslot route changes, disabling channel TSA
entries needs to be supported.

Add support for this new feature.

Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Link: https://lore.kernel.org/r/20231205152116.122512-13-herve.codina@bootlin.com
drivers/soc/fsl/qe/qmc.c

index 8d71e63d0f21b99ae40a20ffaf81825827fada7a..c1318fad296bdd032d6d9776c6cc49128b42cae3 100644 (file)
@@ -567,7 +567,8 @@ end:
        spin_unlock_irqrestore(&chan->rx_lock, flags);
 }
 
-static int qmc_chan_setup_tsa_64rxtx(struct qmc_chan *chan, const struct tsa_serial_info *info)
+static int qmc_chan_setup_tsa_64rxtx(struct qmc_chan *chan, const struct tsa_serial_info *info,
+                                    bool enable)
 {
        unsigned int i;
        u16 curr;
@@ -603,13 +604,14 @@ static int qmc_chan_setup_tsa_64rxtx(struct qmc_chan *chan, const struct tsa_ser
                        continue;
 
                qmc_clrsetbits16(chan->qmc->scc_pram + QMC_GBL_TSATRX + (i * 2),
-                                ~QMC_TSA_WRAP, val);
+                                ~QMC_TSA_WRAP, enable ? val : 0x0000);
        }
 
        return 0;
 }
 
-static int qmc_chan_setup_tsa_32rx_32tx(struct qmc_chan *chan, const struct tsa_serial_info *info)
+static int qmc_chan_setup_tsa_32rx_32tx(struct qmc_chan *chan, const struct tsa_serial_info *info,
+                                       bool enable)
 {
        unsigned int i;
        u16 curr;
@@ -650,7 +652,7 @@ static int qmc_chan_setup_tsa_32rx_32tx(struct qmc_chan *chan, const struct tsa_
                        continue;
 
                qmc_clrsetbits16(chan->qmc->scc_pram + QMC_GBL_TSATRX + (i * 2),
-                                ~QMC_TSA_WRAP, val);
+                                ~QMC_TSA_WRAP, enable ? val : 0x0000);
        }
        /* Set entries based on Tx stuff */
        for (i = 0; i < info->nb_tx_ts; i++) {
@@ -658,13 +660,13 @@ static int qmc_chan_setup_tsa_32rx_32tx(struct qmc_chan *chan, const struct tsa_
                        continue;
 
                qmc_clrsetbits16(chan->qmc->scc_pram + QMC_GBL_TSATTX + (i * 2),
-                                ~QMC_TSA_WRAP, val);
+                                ~QMC_TSA_WRAP, enable ? val : 0x0000);
        }
 
        return 0;
 }
 
-static int qmc_chan_setup_tsa(struct qmc_chan *chan)
+static int qmc_chan_setup_tsa(struct qmc_chan *chan, bool enable)
 {
        struct tsa_serial_info info;
        int ret;
@@ -679,8 +681,8 @@ static int qmc_chan_setup_tsa(struct qmc_chan *chan)
         * and one for Tx) according to assigned TS numbers.
         */
        return ((info.nb_tx_ts > 32) || (info.nb_rx_ts > 32)) ?
-               qmc_chan_setup_tsa_64rxtx(chan, &info) :
-               qmc_chan_setup_tsa_32rx_32tx(chan, &info);
+               qmc_chan_setup_tsa_64rxtx(chan, &info, enable) :
+               qmc_chan_setup_tsa_32rx_32tx(chan, &info, enable);
 }
 
 static int qmc_chan_command(struct qmc_chan *chan, u8 qmc_opcode)
@@ -1146,7 +1148,7 @@ static int qmc_setup_chan(struct qmc *qmc, struct qmc_chan *chan)
 
        chan->qmc = qmc;
 
-       ret = qmc_chan_setup_tsa(chan);
+       ret = qmc_chan_setup_tsa(chan, true);
        if (ret)
                return ret;