crypto: hisilicon/qm - request reserved interrupt for virtual function

The device interrupt vector 3 is an error interrupt for
physical function and a reserved interrupt for virtual function.
However, the driver has not registered the reserved interrupt for
virtual function. When allocating interrupts, the number of interrupts
is allocated based on powers of two, which includes this interrupt.
When the system enables GICv4 and the virtual function passthrough
to the virtual machine, releasing the interrupt in the driver
triggers a warning.

The WARNING report is:
WARNING: CPU: 62 PID: 14889 at arch/arm64/kvm/vgic/vgic-its.c:852 its_free_ite+0x94/0xb4

Therefore, register a reserved interrupt for VF and set the
IRQF_NO_AUTOEN flag to avoid that warning.

Fixes: 3536cc55cada ("crypto: hisilicon/qm - support get device irq information from hardware registers")
Signed-off-by: Weili Qian <qianweili@huawei.com>
Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c
index 2f96c673b60a5e3cd45144559c01a6e4e267c91b..102aff9ea19a03e04805d9cff3e08151fab239df 100644 (file)
--- a/drivers/crypto/hisilicon/qm.c
+++ b/drivers/crypto/hisilicon/qm.c
@@ -4732,6 +4732,15 @@ flr_done:
 }
 EXPORT_SYMBOL_GPL(hisi_qm_reset_done);
 
+static irqreturn_t qm_rsvd_irq(int irq, void *data)
+{
+       struct hisi_qm *qm = data;
+
+       dev_info(&qm->pdev->dev, "Reserved interrupt, ignore!\n");
+
+       return IRQ_HANDLED;
+}
+
 static irqreturn_t qm_abnormal_irq(int irq, void *data)
 {
        struct hisi_qm *qm = data;
@@ -5015,7 +5024,7 @@ static void qm_unregister_abnormal_irq(struct hisi_qm *qm)
        struct pci_dev *pdev = qm->pdev;
        u32 irq_vector, val;
 
-       if (qm->fun_type == QM_HW_VF)
+       if (qm->fun_type == QM_HW_VF && qm->ver < QM_HW_V3)
                return;
 
        val = qm->cap_tables.qm_cap_table[QM_ABNORMAL_IRQ].cap_val;
@@ -5032,17 +5041,28 @@ static int qm_register_abnormal_irq(struct hisi_qm *qm)
        u32 irq_vector, val;
        int ret;
 
-       if (qm->fun_type == QM_HW_VF)
-               return 0;
-
        val = qm->cap_tables.qm_cap_table[QM_ABNORMAL_IRQ].cap_val;
        if (!((val >> QM_IRQ_TYPE_SHIFT) & QM_ABN_IRQ_TYPE_MASK))
                return 0;
-
        irq_vector = val & QM_IRQ_VECTOR_MASK;
+
+       /* For VF, this is a reserved interrupt in V3 version. */
+       if (qm->fun_type == QM_HW_VF) {
+               if (qm->ver < QM_HW_V3)
+                       return 0;
+
+               ret = request_irq(pci_irq_vector(pdev, irq_vector), qm_rsvd_irq,
+                                 IRQF_NO_AUTOEN, qm->dev_name, qm);
+               if (ret) {
+                       dev_err(&pdev->dev, "failed to request reserved irq, ret = %d!\n", ret);
+                       return ret;
+               }
+               return 0;
+       }
+
        ret = request_irq(pci_irq_vector(pdev, irq_vector), qm_abnormal_irq, 0, qm->dev_name, qm);
        if (ret)
-               dev_err(&qm->pdev->dev, "failed to request abnormal irq, ret = %d", ret);
+               dev_err(&qm->pdev->dev, "failed to request abnormal irq, ret = %d!\n", ret);
 
        return ret;
 }
@@ -5408,6 +5428,12 @@ static int hisi_qm_pci_init(struct hisi_qm *qm)
        pci_set_master(pdev);
 
        num_vec = qm_get_irq_num(qm);
+       if (!num_vec) {
+               dev_err(dev, "Device irq num is zero!\n");
+               ret = -EINVAL;
+               goto err_get_pci_res;
+       }
+       num_vec = roundup_pow_of_two(num_vec);
        ret = pci_alloc_irq_vectors(pdev, num_vec, num_vec, PCI_IRQ_MSI);
        if (ret < 0) {
                dev_err(dev, "Failed to enable MSI vectors!\n");