drm/amd/pm: Reset SMU v13.0.x custom settings

On SMU v13.0.2 and SMU v13.0.6 variants user may choose custom min/max
clocks in manual perf mode. Those custom min/max values need to be
reset once user switches to auto or restores default settings.
Otherwise, they may get used inadvertently during the next operation.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
index cd03caffe31735958f7266b6a6ebc4ce90379658..21589c4583e6b38e971b975a12e34aaef7ad9484 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
@@ -310,6 +310,7 @@ int smu_v13_0_get_boot_freq_by_index(struct smu_context *smu,
                                     uint32_t *value);
 
 void smu_v13_0_interrupt_work(struct smu_context *smu);
+void smu_v13_0_reset_custom_level(struct smu_context *smu);
 bool smu_v13_0_12_is_dpm_running(struct smu_context *smu);
 int smu_v13_0_12_get_max_metrics_size(void);
 int smu_v13_0_12_setup_driver_pptable(struct smu_context *smu);

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
index 83163d7c7f0014c97cc7ac923b3b67bc3b2d0675..5cb3b9bb60898f77862982449797ea0ef098b121 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
@@ -1270,6 +1270,7 @@ static int aldebaran_set_performance_level(struct smu_context *smu,
        struct smu_13_0_dpm_table *gfx_table =
                &dpm_context->dpm_tables.gfx_table;
        struct smu_umd_pstate_table *pstate_table = &smu->pstate_table;
+       int r;
 
        /* Disable determinism if switching to another mode */
        if ((smu_dpm->dpm_level == AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM) &&
@@ -1282,7 +1283,11 @@ static int aldebaran_set_performance_level(struct smu_context *smu,
 
        case AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM:
                return 0;
-
+       case AMD_DPM_FORCED_LEVEL_AUTO:
+               r = smu_v13_0_set_performance_level(smu, level);
+               if (!r)
+                       smu_v13_0_reset_custom_level(smu);
+               return r;
        case AMD_DPM_FORCED_LEVEL_HIGH:
        case AMD_DPM_FORCED_LEVEL_LOW:
        case AMD_DPM_FORCED_LEVEL_PROFILE_STANDARD:
@@ -1423,7 +1428,11 @@ static int aldebaran_usr_edit_dpm_table(struct smu_context *smu, enum PP_OD_DPM_
                        min_clk = dpm_context->dpm_tables.gfx_table.min;
                        max_clk = dpm_context->dpm_tables.gfx_table.max;
 
-                       return aldebaran_set_soft_freq_limited_range(smu, SMU_GFXCLK, min_clk, max_clk, false);
+                       ret = aldebaran_set_soft_freq_limited_range(
+                               smu, SMU_GFXCLK, min_clk, max_clk, false);
+                       if (ret)
+                               return ret;
+                       smu_v13_0_reset_custom_level(smu);
                }
                break;
        case PP_OD_COMMIT_DPM_TABLE:

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
index ba5a9012dbd5e3e56272c8a00bd1cc77500ec9d0..075f381ad311ba7740a54a31d0d507d3488c19cf 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
@@ -2595,3 +2595,13 @@ int smu_v13_0_set_wbrf_exclusion_ranges(struct smu_context *smu,
 
        return ret;
 }
+
+void smu_v13_0_reset_custom_level(struct smu_context *smu)
+{
+       struct smu_umd_pstate_table *pstate_table = &smu->pstate_table;
+
+       pstate_table->uclk_pstate.custom.min = 0;
+       pstate_table->uclk_pstate.custom.max = 0;
+       pstate_table->gfxclk_pstate.custom.min = 0;
+       pstate_table->gfxclk_pstate.custom.max = 0;
+}

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
index 6d84257b530147abe3243ac05885c57e623041e0..8d845b5912c54ba6aa7b90a0495b73f8fd8ade4c 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
@@ -1916,7 +1916,7 @@ static int smu_v13_0_6_set_performance_level(struct smu_context *smu,
                                return ret;
                        pstate_table->uclk_pstate.curr.max = uclk_table->max;
                }
-               pstate_table->uclk_pstate.custom.max = 0;
+               smu_v13_0_reset_custom_level(smu);
 
                return 0;
        case AMD_DPM_FORCED_LEVEL_MANUAL:
@@ -2129,7 +2129,7 @@ static int smu_v13_0_6_usr_edit_dpm_table(struct smu_context *smu,
                                smu, SMU_UCLK, min_clk, max_clk, false);
                        if (ret)
                                return ret;
-                       pstate_table->uclk_pstate.custom.max = 0;
+                       smu_v13_0_reset_custom_level(smu);
                }
                break;
        case PP_OD_COMMIT_DPM_TABLE: