]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
3.4-stable patches
authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 7 Jul 2014 17:50:31 +0000 (10:50 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 7 Jul 2014 17:50:31 +0000 (10:50 -0700)
added patches:
drm-radeon-only-apply-hdmi-bpc-pll-flags-when-encoder-mode-is-hdmi.patch
mtd-pxa3xx_nand-make-the-driver-work-on-big-endian-systems.patch

queue-3.4/drm-radeon-only-apply-hdmi-bpc-pll-flags-when-encoder-mode-is-hdmi.patch [new file with mode: 0644]
queue-3.4/mtd-pxa3xx_nand-make-the-driver-work-on-big-endian-systems.patch [new file with mode: 0644]
queue-3.4/series

diff --git a/queue-3.4/drm-radeon-only-apply-hdmi-bpc-pll-flags-when-encoder-mode-is-hdmi.patch b/queue-3.4/drm-radeon-only-apply-hdmi-bpc-pll-flags-when-encoder-mode-is-hdmi.patch
new file mode 100644 (file)
index 0000000..13caa2e
--- /dev/null
@@ -0,0 +1,82 @@
+From 7d5ab3009a8ca777174f6f469277b3922d56fd4b Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Mon, 21 Apr 2014 21:45:09 -0400
+Subject: drm/radeon: only apply hdmi bpc pll flags when encoder mode is hdmi
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 7d5ab3009a8ca777174f6f469277b3922d56fd4b upstream.
+
+May fix display issues with non-HDMI displays.
+
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/atombios_crtc.c |   48 +++++++++++++++++----------------
+ 1 file changed, 26 insertions(+), 22 deletions(-)
+
+--- a/drivers/gpu/drm/radeon/atombios_crtc.c
++++ b/drivers/gpu/drm/radeon/atombios_crtc.c
+@@ -863,14 +863,16 @@ static void atombios_crtc_program_pll(st
+                       args.v5.ucMiscInfo = 0; /* HDMI depth, etc. */
+                       if (ss_enabled && (ss->type & ATOM_EXTERNAL_SS_MASK))
+                               args.v5.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_REF_DIV_SRC;
+-                      switch (bpc) {
+-                      case 8:
+-                      default:
+-                              args.v5.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_HDMI_24BPP;
+-                              break;
+-                      case 10:
+-                              args.v5.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_HDMI_30BPP;
+-                              break;
++                      if (encoder_mode == ATOM_ENCODER_MODE_HDMI) {
++                              switch (bpc) {
++                              case 8:
++                              default:
++                                      args.v5.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_HDMI_24BPP;
++                                      break;
++                              case 10:
++                                      args.v5.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_HDMI_30BPP;
++                                      break;
++                              }
+                       }
+                       args.v5.ucTransmitterID = encoder_id;
+                       args.v5.ucEncoderMode = encoder_mode;
+@@ -885,20 +887,22 @@ static void atombios_crtc_program_pll(st
+                       args.v6.ucMiscInfo = 0; /* HDMI depth, etc. */
+                       if (ss_enabled && (ss->type & ATOM_EXTERNAL_SS_MASK))
+                               args.v6.ucMiscInfo |= PIXEL_CLOCK_V6_MISC_REF_DIV_SRC;
+-                      switch (bpc) {
+-                      case 8:
+-                      default:
+-                              args.v6.ucMiscInfo |= PIXEL_CLOCK_V6_MISC_HDMI_24BPP;
+-                              break;
+-                      case 10:
+-                              args.v6.ucMiscInfo |= PIXEL_CLOCK_V6_MISC_HDMI_30BPP;
+-                              break;
+-                      case 12:
+-                              args.v6.ucMiscInfo |= PIXEL_CLOCK_V6_MISC_HDMI_36BPP;
+-                              break;
+-                      case 16:
+-                              args.v6.ucMiscInfo |= PIXEL_CLOCK_V6_MISC_HDMI_48BPP;
+-                              break;
++                      if (encoder_mode == ATOM_ENCODER_MODE_HDMI) {
++                              switch (bpc) {
++                              case 8:
++                              default:
++                                      args.v6.ucMiscInfo |= PIXEL_CLOCK_V6_MISC_HDMI_24BPP;
++                                      break;
++                              case 10:
++                                      args.v6.ucMiscInfo |= PIXEL_CLOCK_V6_MISC_HDMI_30BPP;
++                                      break;
++                              case 12:
++                                      args.v6.ucMiscInfo |= PIXEL_CLOCK_V6_MISC_HDMI_36BPP;
++                                      break;
++                              case 16:
++                                      args.v6.ucMiscInfo |= PIXEL_CLOCK_V6_MISC_HDMI_48BPP;
++                                      break;
++                              }
+                       }
+                       args.v6.ucTransmitterID = encoder_id;
+                       args.v6.ucEncoderMode = encoder_mode;
diff --git a/queue-3.4/mtd-pxa3xx_nand-make-the-driver-work-on-big-endian-systems.patch b/queue-3.4/mtd-pxa3xx_nand-make-the-driver-work-on-big-endian-systems.patch
new file mode 100644 (file)
index 0000000..6eda747
--- /dev/null
@@ -0,0 +1,49 @@
+From b7e460624f0f3c31150f3b09e75b0d009e22ba5f Mon Sep 17 00:00:00 2001
+From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+Date: Thu, 22 May 2014 14:56:52 +0200
+Subject: mtd: pxa3xx_nand: make the driver work on big-endian systems
+
+From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+
+commit b7e460624f0f3c31150f3b09e75b0d009e22ba5f upstream.
+
+The pxa3xx_nand driver currently uses __raw_writel() and __raw_readl()
+to access I/O registers. However, those functions do not do any
+endianness swapping, which means that they won't work when the CPU
+runs in big-endian but the I/O registers are little endian, which is
+the common situation for ARM systems running big endian.
+
+Since __raw_writel() and __raw_readl() do not include any memory
+barriers and the pxa3xx_nand driver can only be compiled for ARM
+platforms, the closest I/o accessors functions that do endianess
+swapping are writel_relaxed() and readl_relaxed().
+
+This patch has been verified to work on Armada XP GP: without the
+patch, the NAND is not detected when the kernel runs big endian while
+it is properly detected when the kernel runs little endian. With the
+patch applied, the NAND is properly detected in both situations
+(little and big endian).
+
+Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+Signed-off-by: Brian Norris <computersforpeace@gmail.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mtd/nand/pxa3xx_nand.c |    4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/mtd/nand/pxa3xx_nand.c
++++ b/drivers/mtd/nand/pxa3xx_nand.c
+@@ -93,10 +93,10 @@
+ /* macros for registers read/write */
+ #define nand_writel(info, off, val)   \
+-      __raw_writel((val), (info)->mmio_base + (off))
++      writel_relaxed((val), (info)->mmio_base + (off))
+ #define nand_readl(info, off)         \
+-      __raw_readl((info)->mmio_base + (off))
++      readl_relaxed((info)->mmio_base + (off))
+ /* error code and state */
+ enum {
index 13a7f9493c7d9fd95becc13b04c68ed7bbe5ef2e..aad2429b0a86037248201e7b7607591c1733880b 100644 (file)
@@ -8,3 +8,5 @@ usb-ftdi_sio-fix-null-deref-at-port-probe.patch
 usb-gadget-f_fs-fix-null-pointer-dereference-when-there-are-no-strings.patch
 rt2x00-disable-tkip-on-usb.patch
 rt2x00-fix-rfkill-regression-on-rt2500pci.patch
+mtd-pxa3xx_nand-make-the-driver-work-on-big-endian-systems.patch
+drm-radeon-only-apply-hdmi-bpc-pll-flags-when-encoder-mode-is-hdmi.patch