--- /dev/null
+From 92bdd3f5eba299b33c2f4407977d6fa2e2a6a0da Mon Sep 17 00:00:00 2001
+From: Arnd Bergmann <arnd@arndb.de>
+Date: Fri, 31 May 2013 22:49:22 +0100
+Subject: ARM: 7742/1: topology: export cpu_topology
+
+From: Arnd Bergmann <arnd@arndb.de>
+
+commit 92bdd3f5eba299b33c2f4407977d6fa2e2a6a0da upstream.
+
+The cpu_topology symbol is required by any driver using the topology
+interfaces, which leads to a couple of build errors:
+
+ERROR: "cpu_topology" [drivers/net/ethernet/sfc/sfc.ko] undefined!
+ERROR: "cpu_topology" [drivers/cpufreq/arm_big_little.ko] undefined!
+ERROR: "cpu_topology" [drivers/block/mtip32xx/mtip32xx.ko] undefined!
+
+The obvious solution is to export this symbol.
+
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+Acked-by: Will Deacon <will.deacon@arm.com>
+Cc: Nicolas Pitre <nico@linaro.org>
+Cc: Vincent Guittot <vincent.guittot@linaro.org>
+Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/kernel/topology.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/arch/arm/kernel/topology.c
++++ b/arch/arm/kernel/topology.c
+@@ -13,6 +13,7 @@
+
+ #include <linux/cpu.h>
+ #include <linux/cpumask.h>
++#include <linux/export.h>
+ #include <linux/init.h>
+ #include <linux/percpu.h>
+ #include <linux/node.h>
+@@ -200,6 +201,7 @@ static inline void update_cpu_power(unsi
+ * cpu topology table
+ */
+ struct cputopo_arm cpu_topology[NR_CPUS];
++EXPORT_SYMBOL_GPL(cpu_topology);
+
+ const struct cpumask *cpu_coregroup_mask(int cpu)
+ {
--- /dev/null
+From da94a829305f1c217cfdf6771cb1faca0917e3b9 Mon Sep 17 00:00:00 2001
+From: Arnd Bergmann <arnd@arndb.de>
+Date: Fri, 31 May 2013 22:50:47 +0100
+Subject: ARM: 7743/1: compressed/head.S: work around new binutils warning
+
+From: Arnd Bergmann <arnd@arndb.de>
+
+commit da94a829305f1c217cfdf6771cb1faca0917e3b9 upstream.
+
+In August 2012, Matthew Gretton-Dann checked a change into binutils
+labelled "Error on obsolete & warn on deprecated registers", apparently as
+part of ARMv8 support. Apparently, this was supposed to emit the message
+"Warning: This coprocessor register access is deprecated in ARMv8" when
+using certain mcr/mrc instructions and building for ARMv8. Unfortunately,
+the message that is actually emitted appears to be '(null)', which is
+less helpful in comparison.
+
+Even more unfortunately, this is biting us on every single kernel
+build with a new gas, because arch/arm/boot/compressed/head.S and some
+other files in that directory are built with -march=all since kernel
+commit 80cec14a8 "[ARM] Add -march=all to assembly file build in
+arch/arm/boot/compressed" back in v2.6.28.
+
+This patch reverts Russell's nice solution and instead marks the head.S
+file to be built for armv7-a, which fortunately lets us build all
+instructions in that file without warnings even on the broken binutils.
+
+Without this patch, building anything results in:
+
+arch/arm/boot/compressed/head.S: Assembler messages:
+arch/arm/boot/compressed/head.S:565: Warning: (null)
+arch/arm/boot/compressed/head.S:676: Warning: (null)
+arch/arm/boot/compressed/head.S:698: Warning: (null)
+arch/arm/boot/compressed/head.S:722: Warning: (null)
+arch/arm/boot/compressed/head.S:726: Warning: (null)
+arch/arm/boot/compressed/head.S:957: Warning: (null)
+arch/arm/boot/compressed/head.S:996: Warning: (null)
+arch/arm/boot/compressed/head.S:997: Warning: (null)
+arch/arm/boot/compressed/head.S:1027: Warning: (null)
+arch/arm/boot/compressed/head.S:1035: Warning: (null)
+arch/arm/boot/compressed/head.S:1046: Warning: (null)
+arch/arm/boot/compressed/head.S:1060: Warning: (null)
+arch/arm/boot/compressed/head.S:1092: Warning: (null)
+arch/arm/boot/compressed/head.S:1094: Warning: (null)
+arch/arm/boot/compressed/head.S:1095: Warning: (null)
+arch/arm/boot/compressed/head.S:1102: Warning: (null)
+arch/arm/boot/compressed/head.S:1134: Warning: (null)
+
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+Cc: Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/boot/compressed/Makefile | 2 +-
+ arch/arm/boot/compressed/head-sa1100.S | 1 +
+ arch/arm/boot/compressed/head-shark.S | 1 +
+ arch/arm/boot/compressed/head.S | 1 +
+ 4 files changed, 4 insertions(+), 1 deletion(-)
+
+--- a/arch/arm/boot/compressed/Makefile
++++ b/arch/arm/boot/compressed/Makefile
+@@ -121,7 +121,7 @@ KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CF
+ endif
+
+ ccflags-y := -fpic -mno-single-pic-base -fno-builtin -I$(obj)
+-asflags-y := -Wa,-march=all -DZIMAGE
++asflags-y := -DZIMAGE
+
+ # Supply kernel BSS size to the decompressor via a linker symbol.
+ KBSS_SZ = $(shell $(CROSS_COMPILE)size $(obj)/../../../../vmlinux | \
+--- a/arch/arm/boot/compressed/head-sa1100.S
++++ b/arch/arm/boot/compressed/head-sa1100.S
+@@ -11,6 +11,7 @@
+ #include <asm/mach-types.h>
+
+ .section ".start", "ax"
++ .arch armv4
+
+ __SA1100_start:
+
+--- a/arch/arm/boot/compressed/head-shark.S
++++ b/arch/arm/boot/compressed/head-shark.S
+@@ -18,6 +18,7 @@
+
+ .section ".start", "ax"
+
++ .arch armv4
+ b __beginning
+
+ __ofw_data: .long 0 @ the number of memory blocks
+--- a/arch/arm/boot/compressed/head.S
++++ b/arch/arm/boot/compressed/head.S
+@@ -11,6 +11,7 @@
+ #include <linux/linkage.h>
+ #include <asm/assembler.h>
+
++ .arch armv7-a
+ /*
+ * Debugging stuff
+ *
--- /dev/null
+From 509eb76ebf9771abc9fe51859382df2571f11447 Mon Sep 17 00:00:00 2001
+From: Will Deacon <will.deacon@arm.com>
+Date: Wed, 5 Jun 2013 11:20:33 +0100
+Subject: ARM: 7747/1: pcpu: ensure __my_cpu_offset cannot be re-ordered across barrier()
+
+From: Will Deacon <will.deacon@arm.com>
+
+commit 509eb76ebf9771abc9fe51859382df2571f11447 upstream.
+
+__my_cpu_offset is non-volatile, since we want its value to be cached
+when we access several per-cpu variables in a row with preemption
+disabled. This means that we rely on preempt_{en,dis}able to hazard
+with the operation via the barrier() macro, so that we can't end up
+migrating CPUs without reloading the per-cpu offset.
+
+Unfortunately, GCC doesn't treat a "memory" clobber on a non-volatile
+asm block as a side-effect, and will happily re-order it before other
+memory clobbers (including those in prempt_disable()) and cache the
+value. This has been observed to break the cmpxchg logic in the slub
+allocator, leading to livelock in kmem_cache_alloc in mainline kernels.
+
+This patch adds a dummy memory input operand to __my_cpu_offset,
+forcing it to be ordered with respect to the barrier() macro.
+
+Reviewed-by: Nicolas Pitre <nico@linaro.org>
+Cc: Rob Herring <rob.herring@calxeda.com>
+Signed-off-by: Will Deacon <will.deacon@arm.com>
+Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/include/asm/percpu.h | 11 +++++++++--
+ 1 file changed, 9 insertions(+), 2 deletions(-)
+
+--- a/arch/arm/include/asm/percpu.h
++++ b/arch/arm/include/asm/percpu.h
+@@ -30,8 +30,15 @@ static inline void set_my_cpu_offset(uns
+ static inline unsigned long __my_cpu_offset(void)
+ {
+ unsigned long off;
+- /* Read TPIDRPRW */
+- asm("mrc p15, 0, %0, c13, c0, 4" : "=r" (off) : : "memory");
++ register unsigned long *sp asm ("sp");
++
++ /*
++ * Read TPIDRPRW.
++ * We want to allow caching the value, so avoid using volatile and
++ * instead use a fake stack read to hazard against barrier().
++ */
++ asm("mrc p15, 0, %0, c13, c0, 4" : "=r" (off) : "Q" (*sp));
++
+ return off;
+ }
+ #define __my_cpu_offset __my_cpu_offset()
--- /dev/null
+From e89b4058096569c999fa599370162022a5a2b3d2 Mon Sep 17 00:00:00 2001
+From: Andrew Lunn <andrew@lunn.ch>
+Date: Tue, 21 May 2013 19:41:48 +0200
+Subject: ARM: Kirkwood: TS219: Fix crash by double PCIe instantiation
+
+From: Andrew Lunn <andrew@lunn.ch>
+
+commit e89b4058096569c999fa599370162022a5a2b3d2 upstream.
+
+When creating the DT based boards-ts219.c the none DT ts219-setup.c
+was used as a template. This includes a lateinit() call to initialize
+the PCIe bus. The code makes use of machine_is_ts219() which is never
+true on DT, so a FIXME was added and the code left as is. This was
+unproblematic until b73690c8f8b5d: "ARM: Kirkwood: Support basic
+hotplug for PCI-E" which changes the way the PCIe bus is
+initialized. The non-DT ts219-setup.c now crashes during boot. The
+lateinit() call in the DT boards-ts219.c is being called,
+machine_is_ts219() is true and so the PCIe is initialized a second
+time.
+
+This patch removes the useless, and now clearly dangerous, code from
+boards-ts219.c, making ts219-setup.c work again.
+
+Signed-off-by: Andrew Lunn <andrew@lunn.ch>
+Signed-off-by: Jason Cooper <jason@lakedaemon.net>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/mach-kirkwood/board-ts219.c | 10 ----------
+ 1 file changed, 10 deletions(-)
+
+--- a/arch/arm/mach-kirkwood/board-ts219.c
++++ b/arch/arm/mach-kirkwood/board-ts219.c
+@@ -41,13 +41,3 @@ void __init qnap_dt_ts219_init(void)
+
+ pm_power_off = qnap_tsx1x_power_off;
+ }
+-
+-/* FIXME: Will not work with DT. Maybe use MPP40_GPIO? */
+-static int __init ts219_pci_init(void)
+-{
+- if (machine_is_ts219())
+- kirkwood_pcie_init(KW_PCIE0);
+-
+- return 0;
+-}
+-subsys_initcall(ts219_pci_init);
--- /dev/null
+From 9ecb41bd8cf002fd8f3e063db4df81647ddd623c Mon Sep 17 00:00:00 2001
+From: Rabin Vincent <rabin.vincent@stericsson.com>
+Date: Mon, 27 May 2013 16:03:40 +0200
+Subject: dmaengine: ste_dma40: fix pm runtime ref counting
+
+From: Rabin Vincent <rabin.vincent@stericsson.com>
+
+commit 9ecb41bd8cf002fd8f3e063db4df81647ddd623c upstream.
+
+The pm runtime reference counting of the driver is broken for the case
+when there is more than one transfer queued, leading to the device being
+runtime suspend while active. Fix it.
+
+Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
+Acked-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Vinod Koul <vinod.koul@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/dma/ste_dma40.c | 8 +++++---
+ 1 file changed, 5 insertions(+), 3 deletions(-)
+
+--- a/drivers/dma/ste_dma40.c
++++ b/drivers/dma/ste_dma40.c
+@@ -1566,10 +1566,12 @@ static void dma_tc_handle(struct d40_cha
+ return;
+ }
+
+- if (d40_queue_start(d40c) == NULL)
++ if (d40_queue_start(d40c) == NULL) {
+ d40c->busy = false;
+- pm_runtime_mark_last_busy(d40c->base->dev);
+- pm_runtime_put_autosuspend(d40c->base->dev);
++
++ pm_runtime_mark_last_busy(d40c->base->dev);
++ pm_runtime_put_autosuspend(d40c->base->dev);
++ }
+
+ d40_desc_remove(d40d);
+ d40_desc_done(d40c, d40d);
--- /dev/null
+From 1cbcca302a318499f20a512847c5d6a510c08c35 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Mon, 3 Jun 2013 10:32:40 -0400
+Subject: drm/radeon: don't allow audio on DCE6
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 1cbcca302a318499f20a512847c5d6a510c08c35 upstream.
+
+It's not supported yet. Fixes display issues when
+users force it on.
+
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/atombios_encoders.c | 11 ++++++++---
+ 1 file changed, 8 insertions(+), 3 deletions(-)
+
+--- a/drivers/gpu/drm/radeon/atombios_encoders.c
++++ b/drivers/gpu/drm/radeon/atombios_encoders.c
+@@ -667,6 +667,8 @@ atombios_digital_setup(struct drm_encode
+ int
+ atombios_get_encoder_mode(struct drm_encoder *encoder)
+ {
++ struct drm_device *dev = encoder->dev;
++ struct radeon_device *rdev = dev->dev_private;
+ struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+ struct drm_connector *connector;
+ struct radeon_connector *radeon_connector;
+@@ -693,7 +695,8 @@ atombios_get_encoder_mode(struct drm_enc
+ case DRM_MODE_CONNECTOR_DVII:
+ case DRM_MODE_CONNECTOR_HDMIB: /* HDMI-B is basically DL-DVI; analog works fine */
+ if (drm_detect_hdmi_monitor(radeon_connector->edid) &&
+- radeon_audio)
++ radeon_audio &&
++ !ASIC_IS_DCE6(rdev)) /* remove once we support DCE6 */
+ return ATOM_ENCODER_MODE_HDMI;
+ else if (radeon_connector->use_digital)
+ return ATOM_ENCODER_MODE_DVI;
+@@ -704,7 +707,8 @@ atombios_get_encoder_mode(struct drm_enc
+ case DRM_MODE_CONNECTOR_HDMIA:
+ default:
+ if (drm_detect_hdmi_monitor(radeon_connector->edid) &&
+- radeon_audio)
++ radeon_audio &&
++ !ASIC_IS_DCE6(rdev)) /* remove once we support DCE6 */
+ return ATOM_ENCODER_MODE_HDMI;
+ else
+ return ATOM_ENCODER_MODE_DVI;
+@@ -718,7 +722,8 @@ atombios_get_encoder_mode(struct drm_enc
+ (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
+ return ATOM_ENCODER_MODE_DP;
+ else if (drm_detect_hdmi_monitor(radeon_connector->edid) &&
+- radeon_audio)
++ radeon_audio &&
++ !ASIC_IS_DCE6(rdev)) /* remove once we support DCE6 */
+ return ATOM_ENCODER_MODE_HDMI;
+ else
+ return ATOM_ENCODER_MODE_DVI;
--- /dev/null
+From b8b3de224f194005ad87ede6fd022fcc2bef3b1a Mon Sep 17 00:00:00 2001
+From: Gavin Shan <shangw@linux.vnet.ibm.com>
+Date: Wed, 5 Jun 2013 14:25:50 +0000
+Subject: powerpc/eeh: Don't check RTAS token to get PE addr
+
+From: Gavin Shan <shangw@linux.vnet.ibm.com>
+
+commit b8b3de224f194005ad87ede6fd022fcc2bef3b1a upstream.
+
+RTAS token "ibm,get-config-addr-info" or ibm,get-config-addr-info2"
+are used to retrieve the PE address according to PCI address, which
+made up of domain/bus/slot/function. If we don't have those 2 tokens,
+the domain/bus/slot/function would be used as the address for EEH
+RTAS operations. Some older f/w might not have those 2 tokens and
+that blocks the EEH functionality to be initialized. It was introduced
+by commit e2af155c ("powerpc/eeh: pseries platform EEH initialization").
+
+The patch skips the check on those 2 tokens so we can bring up EEH
+functionality successfully. And domain/bus/slot/function will be
+used as address for EEH RTAS operations.
+
+Reported-by: Robert Knight <knight@princeton.edu>
+Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
+Tested-by: Robert Knight <knight@princeton.edu>
+Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/powerpc/platforms/pseries/eeh_pseries.c | 12 +++++-------
+ 1 file changed, 5 insertions(+), 7 deletions(-)
+
+--- a/arch/powerpc/platforms/pseries/eeh_pseries.c
++++ b/arch/powerpc/platforms/pseries/eeh_pseries.c
+@@ -83,7 +83,11 @@ static int pseries_eeh_init(void)
+ ibm_configure_pe = rtas_token("ibm,configure-pe");
+ ibm_configure_bridge = rtas_token("ibm,configure-bridge");
+
+- /* necessary sanity check */
++ /*
++ * Necessary sanity check. We needn't check "get-config-addr-info"
++ * and its variant since the old firmware probably support address
++ * of domain/bus/slot/function for EEH RTAS operations.
++ */
+ if (ibm_set_eeh_option == RTAS_UNKNOWN_SERVICE) {
+ pr_warning("%s: RTAS service <ibm,set-eeh-option> invalid\n",
+ __func__);
+@@ -102,12 +106,6 @@ static int pseries_eeh_init(void)
+ pr_warning("%s: RTAS service <ibm,slot-error-detail> invalid\n",
+ __func__);
+ return -EINVAL;
+- } else if (ibm_get_config_addr_info2 == RTAS_UNKNOWN_SERVICE &&
+- ibm_get_config_addr_info == RTAS_UNKNOWN_SERVICE) {
+- pr_warning("%s: RTAS service <ibm,get-config-addr-info2> and "
+- "<ibm,get-config-addr-info> invalid\n",
+- __func__);
+- return -EINVAL;
+ } else if (ibm_configure_pe == RTAS_UNKNOWN_SERVICE &&
+ ibm_configure_bridge == RTAS_UNKNOWN_SERVICE) {
+ pr_warning("%s: RTAS service <ibm,configure-pe> and "
--- /dev/null
+From 82a9f16adc12f51c3f8ea59a7c3c120241aff836 Mon Sep 17 00:00:00 2001
+From: Michael Neuling <mikey@neuling.org>
+Date: Thu, 16 May 2013 20:27:31 +0000
+Subject: powerpc/hw_breakpoints: Add DABRX cpu feature to fix 32-bit regression
+
+From: Michael Neuling <mikey@neuling.org>
+
+commit 82a9f16adc12f51c3f8ea59a7c3c120241aff836 upstream.
+
+When introducing support for DABRX in 4474ef0, we broke older 32-bit CPUs
+that don't have that register.
+
+Some CPUs have a DABR but not DABRX. Configuration are:
+- No 32bit CPUs have DABRX but some have DABR.
+- POWER4+ and below have the DABR but no DABRX.
+- 970 and POWER5 and above have DABR and DABRX.
+- POWER8 has DAWR, hence no DABRX.
+
+This introduces CPU_FTR_DABRX and sets it on appropriate CPUs. We use
+the top 64 bits for CPU FTR bits since only 64 bit CPUs have this.
+
+Processors that don't have the DABRX will still work as they will fall
+back to software filtering these breakpoints via perf_exclude_event().
+
+Signed-off-by: Michael Neuling <mikey@neuling.org>
+Reported-by: "Gorelik, Jacob (335F)" <jacob.gorelik@jpl.nasa.gov>
+Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/powerpc/include/asm/cputable.h | 17 ++++++++++-------
+ arch/powerpc/kernel/process.c | 3 ++-
+ 2 files changed, 12 insertions(+), 8 deletions(-)
+
+--- a/arch/powerpc/include/asm/cputable.h
++++ b/arch/powerpc/include/asm/cputable.h
+@@ -175,6 +175,7 @@ extern const char *powerpc_base_platform
+ #define CPU_FTR_BCTAR LONG_ASM_CONST(0x0100000000000000)
+ #define CPU_FTR_HAS_PPR LONG_ASM_CONST(0x0200000000000000)
+ #define CPU_FTR_DAWR LONG_ASM_CONST(0x0400000000000000)
++#define CPU_FTR_DABRX LONG_ASM_CONST(0x0800000000000000)
+
+ #ifndef __ASSEMBLY__
+
+@@ -391,19 +392,20 @@ extern const char *powerpc_base_platform
+ CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | CPU_FTR_ARCH_201 | \
+ CPU_FTR_ALTIVEC_COMP | CPU_FTR_CAN_NAP | CPU_FTR_MMCRA | \
+ CPU_FTR_CP_USE_DCBTZ | CPU_FTR_STCX_CHECKS_ADDRESS | \
+- CPU_FTR_HVMODE)
++ CPU_FTR_HVMODE | CPU_FTR_DABRX)
+ #define CPU_FTRS_POWER5 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
+ CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
+ CPU_FTR_MMCRA | CPU_FTR_SMT | \
+ CPU_FTR_COHERENT_ICACHE | CPU_FTR_PURR | \
+- CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB)
++ CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_DABRX)
+ #define CPU_FTRS_POWER6 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
+ CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
+ CPU_FTR_MMCRA | CPU_FTR_SMT | \
+ CPU_FTR_COHERENT_ICACHE | \
+ CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
+ CPU_FTR_DSCR | CPU_FTR_UNALIGNED_LD_STD | \
+- CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_CFAR)
++ CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_CFAR | \
++ CPU_FTR_DABRX)
+ #define CPU_FTRS_POWER7 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
+ CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | CPU_FTR_ARCH_206 |\
+ CPU_FTR_MMCRA | CPU_FTR_SMT | \
+@@ -412,7 +414,7 @@ extern const char *powerpc_base_platform
+ CPU_FTR_DSCR | CPU_FTR_SAO | CPU_FTR_ASYM_SMT | \
+ CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \
+ CPU_FTR_ICSWX | CPU_FTR_CFAR | CPU_FTR_HVMODE | \
+- CPU_FTR_VMX_COPY | CPU_FTR_HAS_PPR)
++ CPU_FTR_VMX_COPY | CPU_FTR_HAS_PPR | CPU_FTR_DABRX)
+ #define CPU_FTRS_POWER8 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
+ CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | CPU_FTR_ARCH_206 |\
+ CPU_FTR_MMCRA | CPU_FTR_SMT | \
+@@ -427,14 +429,15 @@ extern const char *powerpc_base_platform
+ CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
+ CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
+ CPU_FTR_PAUSE_ZERO | CPU_FTR_CELL_TB_BUG | CPU_FTR_CP_USE_DCBTZ | \
+- CPU_FTR_UNALIGNED_LD_STD)
++ CPU_FTR_UNALIGNED_LD_STD | CPU_FTR_DABRX)
+ #define CPU_FTRS_PA6T (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
+ CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_ALTIVEC_COMP | \
+- CPU_FTR_PURR | CPU_FTR_REAL_LE)
++ CPU_FTR_PURR | CPU_FTR_REAL_LE | CPU_FTR_DABRX)
+ #define CPU_FTRS_COMPATIBLE (CPU_FTR_USE_TB | CPU_FTR_PPCAS_ARCH_V2)
+
+ #define CPU_FTRS_A2 (CPU_FTR_USE_TB | CPU_FTR_SMT | CPU_FTR_DBELL | \
+- CPU_FTR_NOEXECUTE | CPU_FTR_NODSISRALIGN | CPU_FTR_ICSWX)
++ CPU_FTR_NOEXECUTE | CPU_FTR_NODSISRALIGN | \
++ CPU_FTR_ICSWX | CPU_FTR_DABRX )
+
+ #ifdef __powerpc64__
+ #ifdef CONFIG_PPC_BOOK3E
+--- a/arch/powerpc/kernel/process.c
++++ b/arch/powerpc/kernel/process.c
+@@ -392,7 +392,8 @@ static inline int __set_dabr(unsigned lo
+ static inline int __set_dabr(unsigned long dabr, unsigned long dabrx)
+ {
+ mtspr(SPRN_DABR, dabr);
+- mtspr(SPRN_DABRX, dabrx);
++ if (cpu_has_feature(CPU_FTR_DABRX))
++ mtspr(SPRN_DABRX, dabrx);
+ return 0;
+ }
+ #else
--- /dev/null
+From 6772faa1ba22eba18d087c2459030a683b65be57 Mon Sep 17 00:00:00 2001
+From: Michael Ellerman <michael@ellerman.id.au>
+Date: Wed, 5 Jun 2013 17:58:20 +0000
+Subject: powerpc/perf: Fix deadlock caused by calling printk() in PMU exception
+
+From: Michael Ellerman <michael@ellerman.id.au>
+
+commit 6772faa1ba22eba18d087c2459030a683b65be57 upstream.
+
+In commit bc09c21 "Fix finding overflowed PMC in interrupt" we added
+a printk() to the PMU exception handler. Unfortunately that is not safe.
+
+The problem is that the PMU exception may run even when interrupts are
+soft disabled, aka NMI context. We do this so that we can profile parts
+of the kernel that have interrupts soft-disabled.
+
+But by calling printk() from the exception handler, we can potentially
+deadlock in the printk code on logbuf_lock, eg:
+
+ [c00000038ba575c0] c000000000081928 .vprintk_emit+0xa8/0x540
+ [c00000038ba576a0] c0000000007bcde8 .printk+0x48/0x58
+ [c00000038ba57710] c000000000076504 .perf_event_interrupt+0x2d4/0x490
+ [c00000038ba57810] c00000000001f6f8 .performance_monitor_exception+0x48/0x60
+ [c00000038ba57880] c0000000000032cc performance_monitor_common+0x14c/0x180
+ --- Exception: f01 (Performance Monitor) at c0000000007b25d4 ._raw_spin_lock_irq
+ +0x64/0xc0
+ [c00000038ba57bf0] c00000000007ed90 .devkmsg_read+0xd0/0x5a0
+ [c00000038ba57d00] c0000000001c2934 .vfs_read+0xc4/0x1e0
+ [c00000038ba57d90] c0000000001c2cd8 .SyS_read+0x58/0xd0
+ [c00000038ba57e30] c000000000009d54 syscall_exit+0x0/0x98
+ --- Exception: c01 (System Call) at 00001fffffbf6f7c
+ SP (3ffff6d4de10) is in userspace
+
+Fix it by making sure we only call printk() when we are not in NMI
+context.
+
+Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
+Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/powerpc/perf/core-book3s.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/powerpc/perf/core-book3s.c
++++ b/arch/powerpc/perf/core-book3s.c
+@@ -1528,7 +1528,7 @@ static void perf_event_interrupt(struct
+ }
+ }
+ }
+- if ((!found) && printk_ratelimit())
++ if (!found && !nmi && printk_ratelimit())
+ printk(KERN_WARNING "Can't find PMC that caused IRQ\n");
+
+ /*
--- /dev/null
+From e49f3959a96dc279860af7e86e6dbcfda50580a5 Mon Sep 17 00:00:00 2001
+From: Adis Hamzić <adis@hamzadis.com>
+Date: Sun, 2 Jun 2013 16:47:54 +0200
+Subject: radeon: Fix system hang issue when using KMS with older cards
+
+From: Adis Hamzić <adis@hamzadis.com>
+
+commit e49f3959a96dc279860af7e86e6dbcfda50580a5 upstream.
+
+The current radeon driver initialization routines, when using KMS, are written
+so that the IRQ installation routine is called before initializing the WB buffer
+and the CP rings. With some ASICs, though, the IRQ routine tries to access the
+GFX_INDEX ring causing a call to RREG32 with the value of -1 in
+radeon_fence_read. This, in turn causes the system to completely hang with some
+cards, requiring a hard reset.
+
+A call stack that can cause such a hang looks like this (using rv515 ASIC for the
+example here):
+ * rv515_init (rv515.c)
+ * radeon_irq_kms_init (radeon_irq_kms.c)
+ * drm_irq_install (drm_irq.c)
+ * radeon_driver_irq_preinstall_kms (radeon_irq_kms.c)
+ * rs600_irq_process (rs600.c)
+ * radeon_fence_process - due to SW interrupt (radeon_fence.c)
+ * radeon_fence_read (radeon_fence.c)
+ * hang due to RREG32(-1)
+
+The patch moves the IRQ installation to the card startup routine, after the ring
+has been initialized, but before the IRQ has been set. This fixes the issue, but
+requires a check to see if the IRQ is already installed, as is the case in the
+system resume codepath.
+I have tested the patch on three machines using the rv515, the rv770 and the
+evergreen ASIC. They worked without issues.
+
+This seems to be a known issue and has been reported on several bug tracking
+sites by various distributions (see links below). Most of reports recommend
+booting the system with KMS disabled and then enabling KMS by reloading the
+radeon module. For some reason, this was indeed a usable workaround, however,
+UMS is now deprecated and disabled by default.
+
+Bug reports:
+https://bugzilla.redhat.com/show_bug.cgi?id=845745
+https://bugs.launchpad.net/ubuntu/+source/linux/+bug/561789
+https://bbs.archlinux.org/viewtopic.php?id=156964
+
+Signed-off-by: Adis Hamzić <adis@hamzadis.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+
+---
+ drivers/gpu/drm/radeon/evergreen.c | 10 ++++++----
+ drivers/gpu/drm/radeon/ni.c | 10 ++++++----
+ drivers/gpu/drm/radeon/r100.c | 9 ++++++---
+ drivers/gpu/drm/radeon/r300.c | 9 ++++++---
+ drivers/gpu/drm/radeon/r420.c | 10 ++++++----
+ drivers/gpu/drm/radeon/r520.c | 9 ++++++---
+ drivers/gpu/drm/radeon/r600.c | 10 ++++++----
+ drivers/gpu/drm/radeon/rs400.c | 9 ++++++---
+ drivers/gpu/drm/radeon/rs600.c | 9 ++++++---
+ drivers/gpu/drm/radeon/rs690.c | 9 ++++++---
+ drivers/gpu/drm/radeon/rv515.c | 9 ++++++---
+ drivers/gpu/drm/radeon/rv770.c | 10 ++++++----
+ drivers/gpu/drm/radeon/si.c | 10 ++++++----
+ 13 files changed, 78 insertions(+), 45 deletions(-)
+
+--- a/drivers/gpu/drm/radeon/evergreen.c
++++ b/drivers/gpu/drm/radeon/evergreen.c
+@@ -3728,6 +3728,12 @@ static int evergreen_startup(struct rade
+ }
+
+ /* Enable IRQ */
++ if (!rdev->irq.installed) {
++ r = radeon_irq_kms_init(rdev);
++ if (r)
++ return r;
++ }
++
+ r = r600_irq_init(rdev);
+ if (r) {
+ DRM_ERROR("radeon: IH init failed (%d).\n", r);
+@@ -3876,10 +3882,6 @@ int evergreen_init(struct radeon_device
+ if (r)
+ return r;
+
+- r = radeon_irq_kms_init(rdev);
+- if (r)
+- return r;
+-
+ rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ring_obj = NULL;
+ r600_ring_init(rdev, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX], 1024 * 1024);
+
+--- a/drivers/gpu/drm/radeon/ni.c
++++ b/drivers/gpu/drm/radeon/ni.c
+@@ -1711,6 +1711,12 @@ static int cayman_startup(struct radeon_
+ }
+
+ /* Enable IRQ */
++ if (!rdev->irq.installed) {
++ r = radeon_irq_kms_init(rdev);
++ if (r)
++ return r;
++ }
++
+ r = r600_irq_init(rdev);
+ if (r) {
+ DRM_ERROR("radeon: IH init failed (%d).\n", r);
+@@ -1857,10 +1863,6 @@ int cayman_init(struct radeon_device *rd
+ if (r)
+ return r;
+
+- r = radeon_irq_kms_init(rdev);
+- if (r)
+- return r;
+-
+ ring->ring_obj = NULL;
+ r600_ring_init(rdev, ring, 1024 * 1024);
+
+--- a/drivers/gpu/drm/radeon/r100.c
++++ b/drivers/gpu/drm/radeon/r100.c
+@@ -3869,6 +3869,12 @@ static int r100_startup(struct radeon_de
+ }
+
+ /* Enable IRQ */
++ if (!rdev->irq.installed) {
++ r = radeon_irq_kms_init(rdev);
++ if (r)
++ return r;
++ }
++
+ r100_irq_set(rdev);
+ rdev->config.r100.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
+ /* 1M ring buffer */
+@@ -4024,9 +4030,6 @@ int r100_init(struct radeon_device *rdev
+ r = radeon_fence_driver_init(rdev);
+ if (r)
+ return r;
+- r = radeon_irq_kms_init(rdev);
+- if (r)
+- return r;
+ /* Memory manager */
+ r = radeon_bo_init(rdev);
+ if (r)
+--- a/drivers/gpu/drm/radeon/r300.c
++++ b/drivers/gpu/drm/radeon/r300.c
+@@ -1382,6 +1382,12 @@ static int r300_startup(struct radeon_de
+ }
+
+ /* Enable IRQ */
++ if (!rdev->irq.installed) {
++ r = radeon_irq_kms_init(rdev);
++ if (r)
++ return r;
++ }
++
+ r100_irq_set(rdev);
+ rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
+ /* 1M ring buffer */
+@@ -1516,9 +1522,6 @@ int r300_init(struct radeon_device *rdev
+ r = radeon_fence_driver_init(rdev);
+ if (r)
+ return r;
+- r = radeon_irq_kms_init(rdev);
+- if (r)
+- return r;
+ /* Memory manager */
+ r = radeon_bo_init(rdev);
+ if (r)
+--- a/drivers/gpu/drm/radeon/r420.c
++++ b/drivers/gpu/drm/radeon/r420.c
+@@ -265,6 +265,12 @@ static int r420_startup(struct radeon_de
+ }
+
+ /* Enable IRQ */
++ if (!rdev->irq.installed) {
++ r = radeon_irq_kms_init(rdev);
++ if (r)
++ return r;
++ }
++
+ r100_irq_set(rdev);
+ rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
+ /* 1M ring buffer */
+@@ -411,10 +417,6 @@ int r420_init(struct radeon_device *rdev
+ if (r) {
+ return r;
+ }
+- r = radeon_irq_kms_init(rdev);
+- if (r) {
+- return r;
+- }
+ /* Memory manager */
+ r = radeon_bo_init(rdev);
+ if (r) {
+--- a/drivers/gpu/drm/radeon/r520.c
++++ b/drivers/gpu/drm/radeon/r520.c
+@@ -194,6 +194,12 @@ static int r520_startup(struct radeon_de
+ }
+
+ /* Enable IRQ */
++ if (!rdev->irq.installed) {
++ r = radeon_irq_kms_init(rdev);
++ if (r)
++ return r;
++ }
++
+ rs600_irq_set(rdev);
+ rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
+ /* 1M ring buffer */
+@@ -297,9 +303,6 @@ int r520_init(struct radeon_device *rdev
+ r = radeon_fence_driver_init(rdev);
+ if (r)
+ return r;
+- r = radeon_irq_kms_init(rdev);
+- if (r)
+- return r;
+ /* Memory manager */
+ r = radeon_bo_init(rdev);
+ if (r)
+--- a/drivers/gpu/drm/radeon/r600.c
++++ b/drivers/gpu/drm/radeon/r600.c
+@@ -2940,6 +2940,12 @@ static int r600_startup(struct radeon_de
+ }
+
+ /* Enable IRQ */
++ if (!rdev->irq.installed) {
++ r = radeon_irq_kms_init(rdev);
++ if (r)
++ return r;
++ }
++
+ r = r600_irq_init(rdev);
+ if (r) {
+ DRM_ERROR("radeon: IH init failed (%d).\n", r);
+@@ -3094,10 +3100,6 @@ int r600_init(struct radeon_device *rdev
+ if (r)
+ return r;
+
+- r = radeon_irq_kms_init(rdev);
+- if (r)
+- return r;
+-
+ rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ring_obj = NULL;
+ r600_ring_init(rdev, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX], 1024 * 1024);
+
+--- a/drivers/gpu/drm/radeon/rs400.c
++++ b/drivers/gpu/drm/radeon/rs400.c
+@@ -417,6 +417,12 @@ static int rs400_startup(struct radeon_d
+ }
+
+ /* Enable IRQ */
++ if (!rdev->irq.installed) {
++ r = radeon_irq_kms_init(rdev);
++ if (r)
++ return r;
++ }
++
+ r100_irq_set(rdev);
+ rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
+ /* 1M ring buffer */
+@@ -535,9 +541,6 @@ int rs400_init(struct radeon_device *rde
+ r = radeon_fence_driver_init(rdev);
+ if (r)
+ return r;
+- r = radeon_irq_kms_init(rdev);
+- if (r)
+- return r;
+ /* Memory manager */
+ r = radeon_bo_init(rdev);
+ if (r)
+--- a/drivers/gpu/drm/radeon/rs600.c
++++ b/drivers/gpu/drm/radeon/rs600.c
+@@ -923,6 +923,12 @@ static int rs600_startup(struct radeon_d
+ }
+
+ /* Enable IRQ */
++ if (!rdev->irq.installed) {
++ r = radeon_irq_kms_init(rdev);
++ if (r)
++ return r;
++ }
++
+ rs600_irq_set(rdev);
+ rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
+ /* 1M ring buffer */
+@@ -1047,9 +1053,6 @@ int rs600_init(struct radeon_device *rde
+ r = radeon_fence_driver_init(rdev);
+ if (r)
+ return r;
+- r = radeon_irq_kms_init(rdev);
+- if (r)
+- return r;
+ /* Memory manager */
+ r = radeon_bo_init(rdev);
+ if (r)
+--- a/drivers/gpu/drm/radeon/rs690.c
++++ b/drivers/gpu/drm/radeon/rs690.c
+@@ -628,6 +628,12 @@ static int rs690_startup(struct radeon_d
+ }
+
+ /* Enable IRQ */
++ if (!rdev->irq.installed) {
++ r = radeon_irq_kms_init(rdev);
++ if (r)
++ return r;
++ }
++
+ rs600_irq_set(rdev);
+ rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
+ /* 1M ring buffer */
+@@ -753,9 +759,6 @@ int rs690_init(struct radeon_device *rde
+ r = radeon_fence_driver_init(rdev);
+ if (r)
+ return r;
+- r = radeon_irq_kms_init(rdev);
+- if (r)
+- return r;
+ /* Memory manager */
+ r = radeon_bo_init(rdev);
+ if (r)
+--- a/drivers/gpu/drm/radeon/rv515.c
++++ b/drivers/gpu/drm/radeon/rv515.c
+@@ -532,6 +532,12 @@ static int rv515_startup(struct radeon_d
+ }
+
+ /* Enable IRQ */
++ if (!rdev->irq.installed) {
++ r = radeon_irq_kms_init(rdev);
++ if (r)
++ return r;
++ }
++
+ rs600_irq_set(rdev);
+ rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
+ /* 1M ring buffer */
+@@ -662,9 +668,6 @@ int rv515_init(struct radeon_device *rde
+ r = radeon_fence_driver_init(rdev);
+ if (r)
+ return r;
+- r = radeon_irq_kms_init(rdev);
+- if (r)
+- return r;
+ /* Memory manager */
+ r = radeon_bo_init(rdev);
+ if (r)
+--- a/drivers/gpu/drm/radeon/rv770.c
++++ b/drivers/gpu/drm/radeon/rv770.c
+@@ -1041,6 +1041,12 @@ static int rv770_startup(struct radeon_d
+ }
+
+ /* Enable IRQ */
++ if (!rdev->irq.installed) {
++ r = radeon_irq_kms_init(rdev);
++ if (r)
++ return r;
++ }
++
+ r = r600_irq_init(rdev);
+ if (r) {
+ DRM_ERROR("radeon: IH init failed (%d).\n", r);
+@@ -1180,10 +1186,6 @@ int rv770_init(struct radeon_device *rde
+ if (r)
+ return r;
+
+- r = radeon_irq_kms_init(rdev);
+- if (r)
+- return r;
+-
+ rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ring_obj = NULL;
+ r600_ring_init(rdev, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX], 1024 * 1024);
+
+--- a/drivers/gpu/drm/radeon/si.c
++++ b/drivers/gpu/drm/radeon/si.c
+@@ -4374,6 +4374,12 @@ static int si_startup(struct radeon_devi
+ }
+
+ /* Enable IRQ */
++ if (!rdev->irq.installed) {
++ r = radeon_irq_kms_init(rdev);
++ if (r)
++ return r;
++ }
++
+ r = si_irq_init(rdev);
+ if (r) {
+ DRM_ERROR("radeon: IH init failed (%d).\n", r);
+@@ -4534,10 +4540,6 @@ int si_init(struct radeon_device *rdev)
+ if (r)
+ return r;
+
+- r = radeon_irq_kms_init(rdev);
+- if (r)
+- return r;
+-
+ ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];
+ ring->ring_obj = NULL;
+ r600_ring_init(rdev, ring, 1024 * 1024);
alsa-hda-via-fix-wrongly-cleared-pins-after-suspend-on.patch
alsa-hda-allow-setting-automute-automic-hooks-after-parsing.patch
alsa-hda-add-keep_eapd_on-flag-to-generic-parser.patch
+arm-kirkwood-ts219-fix-crash-by-double-pcie-instantiation.patch
+arm-7742-1-topology-export-cpu_topology.patch
+arm-7743-1-compressed-head.s-work-around-new-binutils-warning.patch
+arm-7747-1-pcpu-ensure-__my_cpu_offset-cannot-be-re-ordered-across-barrier.patch
+powerpc-eeh-don-t-check-rtas-token-to-get-pe-addr.patch
+powerpc-hw_breakpoints-add-dabrx-cpu-feature-to-fix-32-bit-regression.patch
+powerpc-perf-fix-deadlock-caused-by-calling-printk-in-pmu-exception.patch
+dmaengine-ste_dma40-fix-pm-runtime-ref-counting.patch
+radeon-fix-system-hang-issue-when-using-kms-with-older-cards.patch
+drm-radeon-don-t-allow-audio-on-dce6.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
