4.4-stable patches

added patches:
	arm-dts-exynos-do-not-ignore-real-world-fuse-values-for-thermal-zone-0-on-exynos5420.patch

diff --git a/queue-4.4/arm-dts-exynos-do-not-ignore-real-world-fuse-values-for-thermal-zone-0-on-exynos5420.patch b/queue-4.4/arm-dts-exynos-do-not-ignore-real-world-fuse-values-for-thermal-zone-0-on-exynos5420.patch
new file mode 100644 (file)
index 0000000..fff1aae
--- /dev/null
+++ b/queue-4.4/arm-dts-exynos-do-not-ignore-real-world-fuse-values-for-thermal-zone-0-on-exynos5420.patch
@@ -0,0 +1,125 @@
+From 28928a3ce142b2e4e5a7a0f067cefb41a3d2c3f9 Mon Sep 17 00:00:00 2001
+From: Krzysztof Kozlowski <krzk@kernel.org>
+Date: Sat, 11 Feb 2017 22:14:56 +0200
+Subject: ARM: dts: exynos: Do not ignore real-world fuse values for thermal zone 0 on Exynos5420
+
+From: Krzysztof Kozlowski <krzk@kernel.org>
+
+commit 28928a3ce142b2e4e5a7a0f067cefb41a3d2c3f9 upstream.
+
+In Odroid XU3 Lite board, the temperature levels reported for thermal
+zone 0 were weird. In warm room:
+       /sys/class/thermal/thermal_zone0/temp:32000
+       /sys/class/thermal/thermal_zone1/temp:51000
+       /sys/class/thermal/thermal_zone2/temp:55000
+       /sys/class/thermal/thermal_zone3/temp:54000
+       /sys/class/thermal/thermal_zone4/temp:51000
+
+Sometimes after booting the value was even equal to ambient temperature
+which is highly unlikely to be a real temperature of sensor in SoC.
+
+The thermal sensor's calibration (trimming) is based on fused values.
+In case of the board above, the fused values are: 35, 52, 43, 58 and 43
+(corresponding to each TMU device).  However driver defined a minimum value
+for fused data as 40 and for smaller values it was using a hard-coded 55
+instead.  This lead to mapping data from sensor to wrong temperatures
+for thermal zone 0.
+
+Various vendor 3.10 trees (Hardkernel's based on Samsung LSI, Artik 10)
+do not impose any limits on fused values.  Since we do not have any
+knowledge about these limits, use 0 as a minimum accepted fused value.
+This should essentially allow accepting any reasonable fused value thus
+behaving like vendor driver.
+
+The exynos5420-tmu-sensor-conf.dtsi is copied directly from existing
+exynos4412 with one change - the samsung,tmu_min_efuse_value.
+
+Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
+Acked-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
+Acked-by: Eduardo Valentin <edubezval@gmail.com>
+Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
+Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
+Reviewed-by: Anand Moon <linux.amoon@gmail.com>
+Tested-by: Anand Moon <linux.amoon@gmail.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/boot/dts/exynos5420-tmu-sensor-conf.dtsi |   25 ++++++++++++++++++++++
+ arch/arm/boot/dts/exynos5420.dtsi                 |   10 ++++----
+ 2 files changed, 30 insertions(+), 5 deletions(-)
+
+--- /dev/null
++++ b/arch/arm/boot/dts/exynos5420-tmu-sensor-conf.dtsi
+@@ -0,0 +1,25 @@
++/*
++ * Device tree sources for Exynos5420 TMU sensor configuration
++ *
++ * Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
++ * Copyright (c) 2017 Krzysztof Kozlowski <krzk@kernel.org>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ */
++
++#include <dt-bindings/thermal/thermal_exynos.h>
++
++#thermal-sensor-cells = <0>;
++samsung,tmu_gain = <8>;
++samsung,tmu_reference_voltage = <16>;
++samsung,tmu_noise_cancel_mode = <4>;
++samsung,tmu_efuse_value = <55>;
++samsung,tmu_min_efuse_value = <0>;
++samsung,tmu_max_efuse_value = <100>;
++samsung,tmu_first_point_trim = <25>;
++samsung,tmu_second_point_trim = <85>;
++samsung,tmu_default_temp_offset = <50>;
++samsung,tmu_cal_type = <TYPE_ONE_POINT_TRIMMING>;
+--- a/arch/arm/boot/dts/exynos5420.dtsi
++++ b/arch/arm/boot/dts/exynos5420.dtsi
+@@ -777,7 +777,7 @@
+               interrupts = <0 65 0>;
+               clocks = <&clock CLK_TMU>;
+               clock-names = "tmu_apbif";
+-              #include "exynos4412-tmu-sensor-conf.dtsi"
++              #include "exynos5420-tmu-sensor-conf.dtsi"
+       };
+ 
+       tmu_cpu1: tmu@10064000 {
+@@ -786,7 +786,7 @@
+               interrupts = <0 183 0>;
+               clocks = <&clock CLK_TMU>;
+               clock-names = "tmu_apbif";
+-              #include "exynos4412-tmu-sensor-conf.dtsi"
++              #include "exynos5420-tmu-sensor-conf.dtsi"
+       };
+ 
+       tmu_cpu2: tmu@10068000 {
+@@ -795,7 +795,7 @@
+               interrupts = <0 184 0>;
+               clocks = <&clock CLK_TMU>, <&clock CLK_TMU>;
+               clock-names = "tmu_apbif", "tmu_triminfo_apbif";
+-              #include "exynos4412-tmu-sensor-conf.dtsi"
++              #include "exynos5420-tmu-sensor-conf.dtsi"
+       };
+ 
+       tmu_cpu3: tmu@1006c000 {
+@@ -804,7 +804,7 @@
+               interrupts = <0 185 0>;
+               clocks = <&clock CLK_TMU>, <&clock CLK_TMU_GPU>;
+               clock-names = "tmu_apbif", "tmu_triminfo_apbif";
+-              #include "exynos4412-tmu-sensor-conf.dtsi"
++              #include "exynos5420-tmu-sensor-conf.dtsi"
+       };
+ 
+       tmu_gpu: tmu@100a0000 {
+@@ -813,7 +813,7 @@
+               interrupts = <0 215 0>;
+               clocks = <&clock CLK_TMU_GPU>, <&clock CLK_TMU>;
+               clock-names = "tmu_apbif", "tmu_triminfo_apbif";
+-              #include "exynos4412-tmu-sensor-conf.dtsi"
++              #include "exynos5420-tmu-sensor-conf.dtsi"
+       };
+ 
+       thermal-zones {

diff --git a/queue-4.4/series b/queue-4.4/series
index 5a1941264a7a9af02284a7ac5bdb8a82e0691c0c..7ea75bb047d6995c934c09e4412f9300b1f93043 100644 (file)
--- a/queue-4.4/series
+++ b/queue-4.4/series
@@ -117,3 +117,4 @@ iscsi_ibft-fix-missing-break-in-switch-statement.patch
 futex-rt_mutex-restructure-rt_mutex_finish_proxy_lock.patch
 arm-dts-exynos-add-minimal-clkout-parameters-to-exynos3250-pmu.patch
 revert-x86-platform-uv-use-efi_runtime_lock-to-seria.patch
+arm-dts-exynos-do-not-ignore-real-world-fuse-values-for-thermal-zone-0-on-exynos5420.patch