KVM: arm64: nv: Remove clearing of ICH_LR<n>.EOI if ICH_LR<n>.HW == 1

In the case of ICH_LR<n>.HW == 1, bit 41 of LR is just a part of pINTID
without EOI meaning, and bit 41 will be zeroed by the subsequent clearing
of ICH_LR_PHYS_ID_MASK anyway.
No functional changes intended.

Signed-off-by: Wei-Lin Chang <r09922117@csie.ntu.edu.tw>
Link: https://lore.kernel.org/r/20250512133223.866999-1-r09922117@csie.ntu.edu.tw
Signed-off-by: Marc Zyngier <maz@kernel.org>

diff --git a/arch/arm64/kvm/vgic/vgic-v3-nested.c b/arch/arm64/kvm/vgic/vgic-v3-nested.c
index bfa5bde1f106799044dd2c2a697e5c5f15e12957..4f6954c306747bf6d84756b9e39d6beb022c4f94 100644 (file)
--- a/arch/arm64/kvm/vgic/vgic-v3-nested.c
+++ b/arch/arm64/kvm/vgic/vgic-v3-nested.c
@@ -240,9 +240,6 @@ static void vgic_v3_create_shadow_lr(struct kvm_vcpu *vcpu,
                        goto next;
                }
 
-               /* It is illegal to have the EOI bit set with HW */
-               lr &= ~ICH_LR_EOI;
-
                /* Translate the virtual mapping to the real one */
                lr &= ~ICH_LR_PHYS_ID_MASK;
                lr |= FIELD_PREP(ICH_LR_PHYS_ID_MASK, (u64)irq->hwintid);