Daily bump.

diff --git a/ChangeLog b/ChangeLog
index c9e75216a7a8c76567a50ce25b1b7cafbfa361b8..ac7c7b3ee55811f675befa06ea4ceb489eca2f17 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,7 @@
+2024-07-05  Filip Kastl  <fkastl@suse.cz>
+
+       * MAINTAINERS: Fix order in Contributing under the DCO.
+
 2024-07-03  Prathamesh Kulkarni  <prathameshk@nvidia.com>
 
        * MAINTAINERS: Update my email address and add myself to DCO.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b36d3df7e14ee642b1572f7fcf5b094a12d23fd7..cddc5960aacceebdddfcea3939afe4ecfe43e1b4 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,79 @@
+2024-07-05  Iain Sandoe  <iain@sandoe.co.uk>
+
+       * config/i386/i386.cc (ix86_cannot_copy_insn_p): New.
+       (TARGET_CANNOT_COPY_INSN_P): New.
+
+2024-07-05  Wilco Dijkstra  <wilco.dijkstra@arm.com>
+
+       PR target/115153
+       * config/arm/arm.cc (arm_legitimate_index_p): Move LDRD case before
+       NEON.
+       (thumb2_legitimate_index_p): Update comments.
+       (output_move_neon): Use DFmode for vldr/vstr and non-checking
+       adjust_address.
+
+2024-07-05  Robin Dapp  <rdapp@ventanamicro.com>
+
+       * config/riscv/autovec.md: Add TU policy.
+       * config/riscv/riscv-protos.h (enum insn_type): Define
+       SCALAR_MOVE_MERGED_OP_TU.
+
+2024-07-05  Georg-Johann Lay  <avr@gjlay.de>
+
+       PR target/87376
+       * config/avr/avr-dimode.md: Use "nop_general_operand" instead
+       of "general_operand" as predicate for all input operands.
+
+2024-07-05  Tamar Christina  <tamar.christina@arm.com>
+
+       * config/aarch64/aarch64.cc (struct expand_vec_perm_d): Add zero_op0_p
+       and zero_op_p1.
+       (aarch64_evpc_tbl): Implement register value remapping.
+       (aarch64_vectorize_vec_perm_const): Detect if operand is a zero dup
+       before it's forced to a reg.
+
+2024-07-05  Tamar Christina  <tamar.christina@arm.com>
+
+       * config/aarch64/aarch64-simd.md
+       (aarch64_simd_vec_unpack<su>_lo_<mode>): Remove.
+       (vec_unpack<su>_lo_<mode): Simplify.
+       * config/aarch64/aarch64.cc (aarch64_gen_shareable_zero): Update
+       comment.
+
+2024-07-05  Alex Coplan  <alex.coplan@arm.com>
+
+       * dominance.cc (dot_dominance_tree): New.
+
+2024-07-05  Hu, Lin1  <lin1.hu@intel.com>
+
+       * config/i386/sse.md (ssedoublemode): Remove mappings to twice
+       the number of same-sized elements. Add mappings to the same
+       number of double-sized elements.
+       (define_split for vec_concat_minus_plus): Change mode_attr from
+       ssedoublemode to ssedoublevecmode.
+       (define_split for vec_concat_plus_minus): Ditto.
+       (<mask_codefor>avx512dq_shuf_<shuffletype>64x2_1<mask_name>):
+       Ditto.
+       (avx512f_shuf_<shuffletype>64x2_1<mask_name>): Ditto.
+       (avx512vl_shuf_<shuffletype>32x4_1<mask_name>): Ditto.
+       (avx512f_shuf_<shuffletype>32x4_1<mask_name>): Ditto.
+
+2024-07-05  YunQiang Su  <syq@gcc.gnu.org>
+
+       * config/mips/mips-protos.h: New function mips_msa_shf_i8.
+       * config/mips/mips-msa.md(MSA_WHB_W): Not used anymore;
+       (msa_shf_<msafmt_f>): Use mips_msa_shf_i8.
+       * config/mips/mips.cc(mips_const_vector_shuffle_set_p):
+       Support more cases try to use alien mode instruction;
+       (mips_msa_shf_i8): New function to get the correct MSA SHF
+       instruction and IMM.
+
+2024-07-05  Richard Biener  <rguenther@suse.de>
+
+       * tree-vect-slp.cc (vect_build_slp_instance): Special case
+       three input permute with the same number of lanes in store
+       permute lowering.
+
 2024-07-04  Siarhei Volkau  <lis8215@gmail.com>
 
        * config/arm/arm.cc (thumb_load_double_from_address): Emit ldmia

diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 90cf77743f7269eb3ae44d97d259c05c92f3a148..d97996cc2870c6812a4c9fce3c7d6884f1328e0d 100644 (file)
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20240705
+20240706

diff --git a/gcc/jit/ChangeLog b/gcc/jit/ChangeLog
index c4f480c5bff859a0c3c73ea874060a2fcc9dd453..631685c4fccd770f15038309e430545467876279 100644 (file)
--- a/gcc/jit/ChangeLog
+++ b/gcc/jit/ChangeLog
@@ -1,3 +1,25 @@
+2024-07-05  Antoni Boucher  <bouanto@zoho.com>
+
+       * jit-common.h: Add array_type class.
+       * jit-recording.h (type::dyn_cast_array_type,
+       memento_of_get_aligned::dyn_cast_array_type,
+       array_type::dyn_cast_array_type, array_type::is_same_type_as):
+       New methods.
+
+2024-07-05  Antoni Boucher  <bouanto@zoho.com>
+
+       PR jit/112574
+       * docs/topics/types.rst: Document GCC_JIT_TYPE_BFLOAT16.
+       * jit-common.h: Update NUM_GCC_JIT_TYPES.
+       * jit-playback.cc (get_tree_node_for_type): Support bfloat16.
+       * jit-recording.cc (recording::memento_of_get_type::get_size,
+       recording::memento_of_get_type::dereference,
+       recording::memento_of_get_type::is_int,
+       recording::memento_of_get_type::is_signed,
+       recording::memento_of_get_type::is_float,
+       recording::memento_of_get_type::is_bool): Support bfloat16.
+       * libgccjit.h (enum gcc_jit_types): Add GCC_JIT_TYPE_BFLOAT16.
+
 2024-06-29  Iain Sandoe  <iain@sandoe.co.uk>
 
        * jit-recording.cc

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index f06b253de8af31e80eabed204c304b4e54a7b292..e12bee67f6b5d159c68bc3694d21a2f337a484cd 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,64 @@
+2024-07-05  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
+
+       * gfortran.dg/ieee/signaling_2.f90: Adjust test.
+       * gfortran.dg/ieee/signaling_2_c.c: Adjust test.
+
+2024-07-05  Wilco Dijkstra  <wilco.dijkstra@arm.com>
+
+       PR target/115153
+       * gcc.target/arm/pr115153.c: Add new test.
+       * lib/target-supports.exp: Add arm_arch_v7ve_neon target support.
+
+2024-07-05  Antoni Boucher  <bouanto@zoho.com>
+
+       * jit.dg/test-types.c: Add array type comparison to the test.
+
+2024-07-05  Antoni Boucher  <bouanto@zoho.com>
+
+       PR jit/112574
+       * jit.dg/all-non-failing-tests.h: New test test-bfloat16.c.
+       * jit.dg/test-types.c: Test GCC_JIT_TYPE_BFLOAT16.
+       * jit.dg/test-bfloat16.c: New test.
+
+2024-07-05  Robin Dapp  <rdapp@ventanamicro.com>
+
+       PR target/115725
+       * gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-1.c: Adjust
+       test expectation.
+       * gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-2.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-3.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-4.c: Ditto.
+
+2024-07-05  Georg-Johann Lay  <avr@gjlay.de>
+
+       PR target/87376
+       * gcc.target/avr/torture/pr87376.c: New test.
+
+2024-07-05  Tamar Christina  <tamar.christina@arm.com>
+
+       * gcc.target/aarch64/tbl_with_zero_1.c: New test.
+       * gcc.target/aarch64/tbl_with_zero_2.c: New test.
+
+2024-07-05  YunQiang Su  <syq@gcc.gnu.org>
+
+       * gcc.target/mips/msa.c: Fix test7_v2f64, test7_v4f32 and
+       test43_v2i64.
+
+2024-07-05  YunQiang Su  <syq@gcc.gnu.org>
+
+       * gcc.target/mips/call-clobbered-1.c: Add -mfpxx.
+
+2024-07-05  YunQiang Su  <syq@gcc.gnu.org>
+
+       * gcc.target/mips/umips-save-restore-1.c: Be sure lwm/swm
+       are used for more callee-saved registers with addtional
+       2 more function calls.
+
+2024-07-05  Richard Biener  <rguenther@suse.de>
+
+       * gcc.dg/vect/slp-53.c: New testcase.
+       * gcc.dg/vect/slp-54.c: New testcase.
+
 2024-07-04  David Malcolm  <dmalcolm@redhat.com>
 
        * gcc.dg/plugin/analyzer_gil_plugin.c: Update all uses of

diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog
index 5c83ecd744e134cf2fd5f5bdbdad0c74f1a5657e..29e8b1fa31a1f47bab6d50ef20233b1ee60b3b9f 100644 (file)
--- a/libstdc++-v3/ChangeLog
+++ b/libstdc++-v3/ChangeLog
@@ -1,3 +1,33 @@
+2024-07-05  Jonathan Wakely  <jwakely@redhat.com>
+
+       PR c++/115747
+       * testsuite/tr1/2_general_utilities/shared_ptr/cons/43820_neg.cc:
+       Add dg-error for new C++26 diagnostics.
+
+2024-07-05  Jonathan Wakely  <jwakely@redhat.com>
+
+       * include/bits/stl_uninitialized.h (_UninitDestroyGuard): New
+       class template and partial specialization.
+       (__do_uninit_copy, __do_uninit_fill, __do_uninit_fill_n)
+       (__uninitialized_copy_a, __uninitialized_fill_a)
+       (__uninitialized_fill_n_a, __uninitialized_copy_move)
+       (__uninitialized_move_copy, __uninitialized_fill_move)
+       (__uninitialized_move_fill, __uninitialized_default_1)
+       (__uninitialized_default_n_a, __uninitialized_default_novalue_1)
+       (__uninitialized_default_novalue_n_1, __uninitialized_copy_n)
+       (__uninitialized_copy_n_pair): Use it.
+
+2024-07-05  Jonathan Wakely  <jwakely@redhat.com>
+
+       PR libstdc++/88545
+       PR libstdc++/115040
+       * include/bits/cpp_type_traits.h (__can_use_memchr_for_find):
+       New variable template.
+       * include/bits/ranges_util.h (__find_fn): Use memchr when
+       possible.
+       * include/bits/stl_algo.h (find): Likewise.
+       * testsuite/25_algorithms/find/bytes.cc: New test.
+
 2024-07-04  John David Anglin  <danglin@gcc.gnu.org>
 
        PR libstdc++/98678