drm/rockchip: vop2: Support 32x8 superblock afbc

This is the only afbc format supported by the upcoming
VOP for rk3576.

Add support for it.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net> # on RK3568
Tested-by: Detlev Casanova <detlev.casanova@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20241231090802.251787-2-andyshrk@163.com

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
index 3ca6a688f5f5b68058d50835f3847aa83556ad1d..17a98845fd31b5b223b734ae9f72f171230aa7cf 100644 (file)
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
@@ -1454,16 +1454,18 @@ static void vop2_plane_atomic_update(struct drm_plane *plane,
                vop2_win_write(win, VOP2_WIN_AFBC_HALF_BLOCK_EN, half_block_en);
 
        if (afbc_en) {
-               u32 stride;
+               u32 stride, block_w;
+
+               /* the afbc superblock is 16 x 16 or 32 x 8 */
+               block_w = fb->modifier & AFBC_FORMAT_MOD_BLOCK_SIZE_32x8 ? 32 : 16;
 
-               /* the afbc superblock is 16 x 16 */
                afbc_format = vop2_convert_afbc_format(fb->format->format);
 
                /* Enable color transform for YTR */
                if (fb->modifier & AFBC_FORMAT_MOD_YTR)
                        afbc_format |= (1 << 4);
 
-               afbc_tile_num = ALIGN(actual_w, 16) >> 4;
+               afbc_tile_num = ALIGN(actual_w, block_w) / block_w;
 
                /*
                 * AFBC pic_vir_width is count by pixel, this is different
@@ -1474,6 +1476,9 @@ static void vop2_plane_atomic_update(struct drm_plane *plane,
                        drm_dbg_kms(vop2->drm, "vp%d %s stride[%d] not 64 pixel aligned\n",
                                    vp->id, win->data->name, stride);
 
+                /* It's for head stride, each head size is 16 byte */
+               stride = ALIGN(stride, block_w) / block_w * 16;
+
                uv_swap = vop2_afbc_uv_swap(fb->format->format);
                /*
                 * This is a workaround for crazy IC design, Cluster
@@ -1504,7 +1509,11 @@ static void vop2_plane_atomic_update(struct drm_plane *plane,
                else
                        vop2_win_write(win, VOP2_WIN_AFBC_AUTO_GATING_EN, 1);
 
-               vop2_win_write(win, VOP2_WIN_AFBC_BLOCK_SPLIT_EN, 0);
+               if (fb->modifier & AFBC_FORMAT_MOD_SPLIT)
+                       vop2_win_write(win, VOP2_WIN_AFBC_BLOCK_SPLIT_EN, 1);
+               else
+                       vop2_win_write(win, VOP2_WIN_AFBC_BLOCK_SPLIT_EN, 0);
+
                transform_offset = vop2_afbc_transform_offset(pstate, half_block_en);
                vop2_win_write(win, VOP2_WIN_AFBC_HDR_PTR, yrgb_mst);
                vop2_win_write(win, VOP2_WIN_AFBC_PIC_SIZE, act_info);