+2003-10-13 Zack Weinberg <zack@codesourcery.com>
+
+ * Makefile.in (BUILD_RTL): Replace $(BUILD_PREFIX)insn-modes.o
+ with min-insn-modes.o.
+ (STAGESTUFF): Add min-insn-modes.c.
+ (genobjs): Add genmodes.o.
+ (print-rtl.o, print-rtl1.o): Depend on $(TM_P_H).
+ (insn-modes.o): Depend on $(TM_H) not $(GTM_H); also real.h.
+ (min-insn-modes.c, min-insn-modes.o): New rules.
+ (s-modes): Also generate min-insn-modes.c.
+ ($(BUILD_PREFIX_1)insn-modes.o): Kill.
+ * genmodes.c (struct mode_data): Add format field.
+ (blank_mode, validate_mode, complete_mode): Update to match.
+ (make_scalar_mode): Separate into make_int_mode and make_float_mode.
+ (_SCALAR_MODE): Kill.
+ (FLOAT_MODE, FRACTIONAL_FLOAT_MODE): Add format argument.
+ (emit_insn_modes_c_header): Adjust.
+ (emit_min_insn_modes_c_header, emit_real_format_for_mode)
+ (emit_min_insn_modes_c): New functions.
+ (emit_insn_modes_c): Call emit_real_format_for_mode.
+ (main): Add -m option to generate min-insn-modes.c.
+ * machmode.h: Update documentation. Add format argument to
+ all uses of FLOAT_MODE.
+ * real.c: Don't define real_format_for_mode here.
+
+ * dwarfout.c: Move default definition of PRINT_REG...
+ * defaults.h: ...here.
+ * print-rtl.c: Include tm_p.h.
+ (DEBUG_PRINT_REG, DEBUG_REGISTER_NAMES, debug_reg_names, reg_names):
+ Kill.
+ (print_rtx): Use PRINT_REG, not DEBUG_PRINT_REG. But surround
+ this entire block with #ifndef GENERATOR_FILE.
+ * regclass.c: Unconditionally define reg_names.
+ * config/mips/mips.h, config/rs6000/rs6000.h, config/sh/sh.h
+ Don't define DEBUG_REGISTER_NAMES.
+ * config/rs6000/darwin.h: Don't use DEBUG_REGISTER_NAMES in
+ redefinition of REGISTER_NAMES.
+ * config/i386/i386.h: Don't define DEBUG_PRINT_REG.
+
+ * combine.c: Change all preprocessor conditionals on
+ EXTRA_CC_MODES to use SELECT_CC_MODE instead; rearrange a bit
+ for clarity.
+ * genopinit.c: Remove mention of EXTRA_CC_MODES in comment.
+ * configure.in: Don't define EXTRA_CC_MODES.
+ * configure, config.in: Regenerate.
+ * doc/tm.texi: Remove documentation of EXTRA_CC_MODES.
+
+ * config/arc/arc.c, config/m32r/m32r.c, config/sparc/sparc.c:
+ May assume that GET_MODE_CLASS is accurate for extra CC modes
+ at all times.
+
+ * config/i860/i860.h (INIT_CUMULATIVE_ARGS): Pass correct
+ number of arguments to aggregate_value_p.
+
+ * genmodes.c (RESET_FLOAT_FORMAT, reset_float_format): New.
+ * machmode.def: Explain ARCH-modes.def. Document
+ RESET_FLOAT_FORMAT. Improve commentary on various mode
+ clusters. Do not define OI, PQI, PHI, PSI, PDI, QF, HF, TQF,
+ XF, or TF modes here. Remove backward-compatibility
+ definition of CC.
+
+ * config/alpha/alpha-modes.def: New file; define TF mode.
+ * config/arc/arm-modes.def: Define XF mode.
+ * config/c4x/c4x-modes.def: Define QF and HF modes. Unset
+ float format for SF and DF modes.
+ * config/dsp16xx/dsp16xx-modes.def: New file; define HF mode.
+ * config/i386/i386-modes.def: Define XF and TF modes.
+ * config/i960/i960-modes.def: Define TF mode.
+ * config/ia64/ia64-modes.def: Define TF and OI modes.
+ * config/m68k/m68k-modes.def: New file; define XF mode.
+ * config/mips/mips-modes.def: New file; define TF mode, reset
+ formats for SF and DF modes.
+ * config/pa/pa-modes.def: Define TF mode.
+ * config/rs6000/rs6000.c: Define TF and PSI modes.
+ * config/s390/s390-modes.def: Define OI mode.
+ * config/sh/sh-modes.def: New file; define PSI mode.
+ * config/sparc/sparc-modes.def: Define TF mode.
+ * config/vax/vax-modes.def: New file; reset formats for SF and
+ DF modes.
+
+ * config/c4x/c4x.c (c4x_override_options): No need to mess
+ with real_format_for_mode or set REAL_MODE_FORMATs.
+ (c4x_immed_int_constant): Don't apply GET_MODE_CLASS to rtx
+ variable.
+ * config/i386/i386.c (override_options): No need to set
+ REAL_MODE_FORMATs here.
+ * config/i960/i960.c (i960_initialize): Likewise.
+ * config/m68k/m68k.c (m68k_override_options): Likewise.
+ * config/ia64/ia64.c (ia64_override_options): Set REAL_MODE_FORMAT
+ for TFmode only if not the default.
+ * config/mips/mips.c (override_options): Likewise.
+ * config/vax/vax.c (override_optionms): Set REAL_MODE_FORMAT for
+ DFmode only if not the default.
+
+ * config/i370/i370.h (RET_REG): Don't consider TFmode.
+ * config/m68hc11/m68hc11.c (print_operand): Don't consider XFmode.
+ * config/dsp16xx/dsp16xx.c (hard_regno_mode_ok): #if 0 out use
+ of modes that don't appear anywhere in the machine description.
+
+ * config/arc/arc-modes.def, config/arm/arm-modes.def
+ * config/c4x/c4x-modes.def, config/frv/frv-modes.def
+ * config/i386/i386-modes.def, config/i960/i960-modes.def
+ * config/ia64/ia64-modes.def, config/mmix/mmix-modes.def
+ * config/pa/pa-modes.def, config/pdp11/pdp11-modes.def
+ * config/rs6000/rs6000-modes.def, config/s390/s390-modes.def
+ * config/sparc/sparc-modes.def: Convert to new style for
+ declaring extra CC modes.
+
2003-10-13 Zack Weinberg <zack@codesourcery.com>
* cpplex.c (_cpp_clean_line): In the common case of a line
BUILD_LIBS = $(BUILD_LIBIBERTY)
BUILD_RTL = $(BUILD_PREFIX)rtl.o read-rtl.o $(BUILD_PREFIX)bitmap.o \
- $(BUILD_PREFIX)ggc-none.o $(BUILD_PREFIX)insn-modes.o
+ $(BUILD_PREFIX)ggc-none.o min-insn-modes.o
BUILD_SUPPORT = gensupport.o insn-conditions.o
BUILD_EARLY_SUPPORT = gensupport.o dummy-conditions.o
STAGESTUFF = *$(objext) insn-flags.h insn-config.h insn-codes.h \
insn-output.c insn-recog.c insn-emit.c insn-extract.c insn-peep.c \
insn-attr.h insn-attrtab.c insn-opinit.c insn-constants.h tm-preds.h \
- tree-check.h insn-conditions.c insn-modes.c insn-modes.h \
+ tree-check.h insn-conditions.c min-insn-modes.c insn-modes.c insn-modes.h \
s-flags s-config s-codes s-mlib s-genrtl s-modes s-gtype gtyp-gen.h \
s-output s-recog s-emit s-extract s-peep s-check s-conditions \
s-attr s-attrtab s-opinit s-preds s-constants s-crt0 \
$(CC) -c $(ALL_CFLAGS) -DGENERATOR_FILE $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION)
print-rtl.o : print-rtl.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(RTL_H) $(TREE_H) \
- hard-reg-set.h $(BASIC_BLOCK_H) real.h
+ hard-reg-set.h $(BASIC_BLOCK_H) real.h $(TM_P_H)
rtlanal.o : rtlanal.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) toplev.h $(RTL_H) \
hard-reg-set.h $(TM_P_H) insn-config.h $(RECOG_H) real.h flags.h
$(SHELL) $(srcdir)/move-if-change tmp-genrtl.c genrtl.c
$(STAMP) s-genrtl
-insn-modes.o : insn-modes.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(GTM_H) \
- $(MACHMODE_H)
-insn-modes.c insn-modes.h : s-modes ; @true
+insn-modes.o : insn-modes.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \
+ $(MACHMODE_H) real.h
+min-insn-modes.c insn-modes.c insn-modes.h : s-modes ; @true
s-modes: genmodes$(build_exeext) $(srcdir)/move-if-change
$(RUN_GEN) ./genmodes$(build_exeext) -h > tmp-modes.h
$(SHELL) $(srcdir)/move-if-change tmp-modes.h insn-modes.h
+ $(RUN_GEN) ./genmodes$(build_exeext) -m > tmp-min-modes.c
+ $(SHELL) $(srcdir)/move-if-change tmp-min-modes.c min-insn-modes.c
$(RUN_GEN) ./genmodes$(build_exeext) > tmp-modes.c
$(SHELL) $(srcdir)/move-if-change tmp-modes.c insn-modes.c
$(STAMP) s-modes
# Object files used in those programs.
genobjs=$(genprognames:%=%.o) read-rtl.o gensupport.o genattrtab.o \
- genautomata.o gengenrtl.o genpreds.o gengtype.o \
+ genautomata.o gengenrtl.o genmodes.o genpreds.o gengtype.o \
genconstants.o gen-protos.o scan.o fix-header.o scan-decls.o \
gencheck.o dummy-conditions.o genconditions.o
$(CC_FOR_BUILD) -c $(BUILD_CFLAGS) $(BUILD_CPPFLAGS) $(INCLUDES) $(BUILD_PREFIX)rtl.c $(OUTPUT_OPTION)
print-rtl1.o: $(srcdir)/print-rtl.c $(BCONFIG_H) coretypes.h $(GTM_H) \
- $(RTL_H) $(TREE_H) hard-reg-set.h $(BASIC_BLOCK_H)
+ $(RTL_H) $(TREE_H) hard-reg-set.h $(BASIC_BLOCK_H) $(TM_P_H)
rm -f print-rtl1.c
sed -e 's/config[.]h/bconfig.h/' $(srcdir)/print-rtl.c > print-rtl1.c
$(CC_FOR_BUILD) -c $(BUILD_CFLAGS) $(BUILD_CPPFLAGS) $(INCLUDES) print-rtl1.c $(OUTPUT_OPTION)
sed -e 's/config[.]h/bconfig.h/' $(srcdir)/ggc-none.c > $(BUILD_PREFIX)ggc-none.c
$(CC_FOR_BUILD) -c $(BUILD_CFLAGS) $(BUILD_CPPFLAGS) $(INCLUDES) $(BUILD_PREFIX)ggc-none.c $(OUTPUT_OPTION)
-$(BUILD_PREFIX_1)insn-modes.o: insn-modes.c $(BCONFIG_H) $(SYSTEM_H) \
- coretypes.h $(GTM_H) $(MACHMODE_H)
- rm -f $(BUILD_PREFIX)insn-modes.c
- sed -e 's/config[.]h/bconfig.h/' $(srcdir)/insn-modes.c > $(BUILD_PREFIX)insn-modes.c
- $(CC_FOR_BUILD) -c $(BUILD_CFLAGS) $(BUILD_CPPFLAGS) $(INCLUDES) $(BUILD_PREFIX)insn-modes.c $(OUTPUT_OPTION)
+min-insn-modes.o: insn-modes.c $(BCONFIG_H) $(SYSTEM_H) $(MACHMODE_H)
+ $(CC_FOR_BUILD) -c $(BUILD_CFLAGS) $(BUILD_CPPFLAGS) $(INCLUDES) \
+ min-insn-modes.c $(OUTPUT_OPTION)
#\f
# Remake internationalization support.
&& XEXP (SET_SRC (PATTERN (i3)), 1) == const0_rtx
&& rtx_equal_p (XEXP (SET_SRC (PATTERN (i3)), 0), i2dest))
{
-#ifdef EXTRA_CC_MODES
+#ifdef SELECT_CC_MODE
rtx *cc_use;
enum machine_mode compare_mode;
#endif
i2_is_used = 1;
-#ifdef EXTRA_CC_MODES
+#ifdef SELECT_CC_MODE
/* See if a COMPARE with the operand we substituted in should be done
with the mode that is currently being used. If not, do the same
processing we do in `subst' for a SET; namely, if the destination
/* Simplify our comparison, if possible. */
new_code = simplify_comparison (old_code, &op0, &op1);
-#ifdef EXTRA_CC_MODES
+#ifdef SELECT_CC_MODE
/* If this machine has CC modes other than CCmode, check to see if we
need to use a different CC mode here. */
compare_mode = SELECT_CC_MODE (new_code, op0, op1);
-#endif /* EXTRA_CC_MODES */
-#if !defined (HAVE_cc0) && defined (EXTRA_CC_MODES)
+#ifndef HAVE_cc0
/* If the mode changed, we have to change SET_DEST, the mode in the
compare, and the mode in the place SET_DEST is used. If SET_DEST is
a hard register, just build new versions with the proper mode. If it
dest = new_dest;
}
}
-#endif
+#endif /* cc0 */
+#endif /* SELECT_CC_MODE */
/* If the code changed, we have to build a new comparison in
undobuf.other_insn. */
for this architecture. */
#undef EXTRA_MODES_FILE
-/* Define if the target architecture needs extra machine modes to represent
- the results of comparisons. */
-#undef EXTRA_CC_MODES
-
/* Define to 1 if translation of program messages to the
user's native language is requested. */
#undef ENABLE_NLS
--- /dev/null
+/* Alpha extra machine modes.
+ Copyright (C) 2003 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING. If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA. */
+
+/* 128-bit floating point. This gets reset in alpha_override_options
+ if VAX float format is in use. */
+FLOAT_MODE (TF, 16, ieee_quad_format);
/* Some insns set all condition code flags, some only set the ZNC flags, and
some only set the ZN flags. */
-CC (CCZNC)
-CC (CCZN)
+CC_MODE (CCZNC);
+CC_MODE (CCZN);
arc_mode_class[i] = 0;
break;
case MODE_CC:
+ arc_mode_class[i] = 1 << (int) C_MODE;
+ break;
default:
- /* mode_class hasn't been initialized yet for EXTRA_CC_MODES, so
- we must explicitly check for them here. */
- if (i == (int) CCmode || i == (int) CCZNmode || i == (int) CCZNCmode)
- arc_mode_class[i] = 1 << (int) C_MODE;
- else
- arc_mode_class[i] = 0;
+ arc_mode_class[i] = 0;
break;
}
}
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
+/* Extended precision floating point.
+ FIXME What format is this? */
+FLOAT_MODE (XF, 12, 0);
+
/* CCFPEmode should be used with floating inequalities,
CCFPmode should be used with floating equalities.
CC_NOOVmode should be used with SImode integer equalities.
CC_Zmode should be used if only the Z flag is set correctly
CCmode should be used otherwise. */
-CC (CC_NOOV)
-CC (CC_Z)
-CC (CC_SWP)
-CC (CCFP)
-CC (CCFPE)
-CC (CC_DNE)
-CC (CC_DEQ)
-CC (CC_DLE)
-CC (CC_DLT)
-CC (CC_DGE)
-CC (CC_DGT)
-CC (CC_DLEU)
-CC (CC_DLTU)
-CC (CC_DGEU)
-CC (CC_DGTU)
-CC (CC_C)
+CC_MODE (CC_NOOV);
+CC_MODE (CC_Z);
+CC_MODE (CC_SWP);
+CC_MODE (CCFP);
+CC_MODE (CCFPE);
+CC_MODE (CC_DNE);
+CC_MODE (CC_DEQ);
+CC_MODE (CC_DLE);
+CC_MODE (CC_DLT);
+CC_MODE (CC_DGE);
+CC_MODE (CC_DGT);
+CC_MODE (CC_DLEU);
+CC_MODE (CC_DLTU);
+CC_MODE (CC_DGEU);
+CC_MODE (CC_DGTU);
+CC_MODE (CC_C);
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
+/* C4x wants 1- and 2-word float modes, in its own peculiar format.
+ FIXME: Give this port a way to get rid of SFmode, DFmode, and all
+ the other modes it doesn't use. */
+FLOAT_MODE (QF, 1, c4x_single_format);
+FLOAT_MODE (HF, 2, c4x_extended_format);
+RESET_FLOAT_FORMAT (SF, 0); /* not used */
+RESET_FLOAT_FORMAT (DF, 0); /* not used */
+
/* Add any extra modes needed to represent the condition code.
On the C4x, we have a "no-overflow" mode which is used when an ADD,
load instructions after an add, subtract, neg, abs or multiply.
We must emit a compare insn to check the result against 0. */
-CC (CC_NOOV)
-
+CC_MODE (CC_NOOV);
This provides compatibility with the old -mno-aliases option. */
if (! TARGET_ALIASES && ! flag_argument_noalias)
flag_argument_noalias = 1;
-
- /* We're C4X floating point, not IEEE floating point. */
- memset (real_format_for_mode, 0, sizeof real_format_for_mode);
- REAL_MODE_FORMAT (QFmode) = &c4x_single_format;
- REAL_MODE_FORMAT (HFmode) = &c4x_extended_format;
}
return 0;
return GET_MODE (op) == VOIDmode
- || GET_MODE_CLASS (op) == MODE_INT
- || GET_MODE_CLASS (op) == MODE_PARTIAL_INT;
+ || GET_MODE_CLASS (GET_MODE (op)) == MODE_INT
+ || GET_MODE_CLASS (GET_MODE (op)) == MODE_PARTIAL_INT;
}
--- /dev/null
+/* DSP16xx extra modes.
+ Copyright (C) 2003 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING. If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA. */
+
+/* HFmode is the DSP16xx's equivalent of SFmode.
+ FIXME: What format is this anyway? */
+FLOAT_MODE (HF, 2, 0);
modes. */
case HFmode:
+ case HImode:
+#if 0 /* ??? These modes do not appear in the machine description nor
+ are there library routines for them. */
case SFmode:
case DFmode:
case XFmode:
- case HImode:
case SImode:
case DImode:
+#endif
if (regno == REG_A0 || regno == REG_A1 || regno == REG_Y || regno == REG_PROD
|| (IS_YBASE_REGISTER_WINDOW(regno) && ((regno & 1) == 0)))
return 1;
CC_FPmode set FCC's from comparing floating point
CC_CCRmode set CCR's to do conditional execution */
-CC (CC_UNS)
-CC (CC_FP)
-CC (CC_CCR)
+CC_MODE (CC_UNS);
+CC_MODE (CC_FP);
+CC_MODE (CC_CCR);
*/
#define RET_REG(MODE) \
- (((MODE) == DCmode || (MODE) == SCmode || (MODE) == TFmode || (MODE) == DFmode || (MODE) == SFmode) ? 16 : 15)
+ (((MODE) == DCmode || (MODE) == SCmode \
+ || (MODE) == DFmode || (MODE) == SFmode) ? 16 : 15)
#define FUNCTION_VALUE(VALTYPE, FUNC) \
gen_rtx_REG (TYPE_MODE (VALTYPE), RET_REG (TYPE_MODE (VALTYPE)))
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
+/* By default our XFmode is the 80-bit extended format. If we use
+ TFmode instead, it's also the 80-bit format, but with padding. */
+
+FLOAT_MODE (XF, 12, ieee_extended_intel_96_format);
+FLOAT_MODE (TF, 16, ieee_extended_intel_128_format);
+
/* Add any extra modes needed to represent the condition code.
For the i386, we need separate modes when floating-point
Add CCZ to indicate that only the Zero flag is valid. */
-CC (CCGC)
-CC (CCGOC)
-CC (CCNO)
-CC (CCZ)
-CC (CCFP)
-CC (CCFPU)
+CC_MODE (CCGC);
+CC_MODE (CCGOC);
+CC_MODE (CCNO);
+CC_MODE (CCZ);
+CC_MODE (CCFP);
+CC_MODE (CCFPU);
int const pta_size = ARRAY_SIZE (processor_alias_table);
- /* By default our XFmode is the 80-bit extended format. If we have
- use TFmode instead, it's also the 80-bit format, but with padding. */
- REAL_MODE_FORMAT (XFmode) = &ieee_extended_intel_96_format;
- REAL_MODE_FORMAT (TFmode) = &ieee_extended_intel_128_format;
-
/* Set the default values for switches whose default depends on TARGET_64BIT
in case they weren't overwritten by command line options. */
if (TARGET_64BIT)
invisible first argument. */
#define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
- ((CUM).ints = ((FNTYPE) != 0 && aggregate_value_p (TREE_TYPE ((FNTYPE))) \
+ ((CUM).ints = ((FNTYPE) != 0 && aggregate_value_p (TREE_TYPE ((FNTYPE)), 0) \
? 4 : 0), \
(CUM).floats = 0)
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
+/* long double */
+FLOAT_MODE (TF, 16, ieee_extended_intel_128_format);
+
/* Add any extra modes needed to represent the condition code.
Also, signed and unsigned comparisons are distinguished, as
are operations which are compatible with chkbit insns. */
-CC (CC_UNS)
-CC (CC_CHK)
+CC_MODE (CC_UNS);
+CC_MODE (CC_CHK);
i960_maxbitalignment = 128;
i960_last_maxbitalignment = 8;
}
-
- /* Tell the compiler which flavor of TFmode we're using. */
- REAL_MODE_FORMAT (TFmode) = &ieee_extended_intel_128_format;
}
\f
/* Return true if OP can be used as the source of an fp move insn. */
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
+/* hpux will override this in ia64_override_options. */
+FLOAT_MODE (TF, 16, ieee_extended_intel_128_format);
+
+/* 256-bit integer mode is needed for STACK_SAVEAREA_MODE. */
+INT_MODE (OI, 32);
+
/* Add any extra modes needed to represent the condition code.
CCImode is used to mark a single predicate register instead
of a register pair. This is currently only used in reg_raw_mode
so that flow doesn't do something stupid. */
-CC (CCI)
+CC_MODE (CCI);
init_machine_status = ia64_init_machine_status;
/* Tell the compiler which flavor of TFmode we're using. */
- if (INTEL_EXTENDED_IEEE_FORMAT)
- REAL_MODE_FORMAT (TFmode) = &ieee_extended_intel_128_format;
+ if (!INTEL_EXTENDED_IEEE_FORMAT)
+ REAL_MODE_FORMAT (TFmode) = &ieee_quad_format;
}
\f
static enum attr_itanium_class ia64_safe_itanium_class (rtx);
m32r_mode_class[i] = 0;
break;
case MODE_CC:
+ m32r_mode_class[i] = 1 << (int) C_MODE;
+ break;
default:
- /* mode_class hasn't been initialized yet for EXTRA_CC_MODES, so
- we must explicitly check for them here. */
- if (i == (int) CCmode)
- m32r_mode_class[i] = 1 << (int) C_MODE;
- else
- m32r_mode_class[i] = 0;
+ m32r_mode_class[i] = 0;
break;
}
}
REAL_VALUE_TO_TARGET_SINGLE (r, l);
asm_fprintf (file, "%I0x%lx", l);
}
- else if (GET_CODE (op) == CONST_DOUBLE
- && (GET_MODE (op) == DFmode || GET_MODE (op) == XFmode))
+ else if (GET_CODE (op) == CONST_DOUBLE && GET_MODE (op) == DFmode)
{
char dstr[30];
--- /dev/null
+/* M68k extra machine modes.
+ Copyright (C) 2003 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING. If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA. */
+
+/* 80-bit floating point (IEEE extended, in a 96-bit field) */
+FLOAT_MODE (XF, 12, ieee_extended_motorola_format);
flag_no_function_cse = 1;
SUBTARGET_OVERRIDE_OPTIONS;
-
- /* Tell the compiler which flavor of XFmode we're using. */
- REAL_MODE_FORMAT (XFmode) = &ieee_extended_motorola_format;
}
\f
/* Return nonzero if FUNC is an interrupt function as specified by the
--- /dev/null
+/* MIPS extra machine modes.
+ Copyright (C) 2003 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING. If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA. */
+
+/* MIPS has a quirky almost-IEEE format for all its
+ floating point. */
+RESET_FLOAT_FORMAT (SF, mips_single_format);
+RESET_FLOAT_FORMAT (DF, mips_double_format);
+
+/* Irix6 will override this via MIPS_TFMODE_FORMAT. */
+FLOAT_MODE (TF, 16, mips_quad_format);
flag_delayed_branch = 0;
}
- REAL_MODE_FORMAT (SFmode) = &mips_single_format;
- REAL_MODE_FORMAT (DFmode) = &mips_double_format;
#ifdef MIPS_TFMODE_FORMAT
REAL_MODE_FORMAT (TFmode) = &MIPS_TFMODE_FORMAT;
-#else
- REAL_MODE_FORMAT (TFmode) = &mips_quad_format;
#endif
mips_print_operand_punct['?'] = 1;
&mips_reg_names[175][0] \
}
-/* print-rtl.c can't use REGISTER_NAMES, since it depends on mips.c.
- So define this for it. */
-#define DEBUG_REGISTER_NAMES \
-{ \
- "$0", "at", "v0", "v1", "a0", "a1", "a2", "a3", \
- "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", \
- "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
- "t8", "t9", "k0", "k1", "gp", "sp", "$fp", "ra", \
- "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", \
- "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \
- "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", \
- "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", \
- "hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4", \
- "$fcc5","$fcc6","$fcc7","$rap", "", "", "", "", \
- "$c0r0", "$c0r1", "$c0r2", "$c0r3", "$c0r4", "$c0r5", "$c0r6", "$c0r7",\
- "$c0r8", "$c0r9", "$c0r10","$c0r11","$c0r12","$c0r13","$c0r14","$c0r15",\
- "$c0r16","$c0r17","$c0r18","$c0r19","$c0r20","$c0r21","$c0r22","$c0r23",\
- "$c0r24","$c0r25","$c0r26","$c0r27","$c0r28","$c0r29","$c0r30","$c0r31",\
- "$c2r0", "$c2r1", "$c2r2", "$c2r3", "$c2r4", "$c2r5", "$c2r6", "$c2r7",\
- "$c2r8", "$c2r9", "$c2r10","$c2r11","$c2r12","$c2r13","$c2r14","$c2r15",\
- "$c2r16","$c2r17","$c2r18","$c2r19","$c2r20","$c2r21","$c2r22","$c2r23",\
- "$c2r24","$c2r25","$c2r26","$c2r27","$c2r28","$c2r29","$c2r30","$c2r31",\
- "$c3r0", "$c3r1", "$c3r2", "$c3r3", "$c3r4", "$c3r5", "$c3r6", "$c3r7",\
- "$c3r8", "$c3r9", "$c3r10","$c3r11","$c3r12","$c3r13","$c3r14","$c3r15",\
- "$c3r16","$c3r17","$c3r18","$c3r19","$c3r20","$c3r21","$c3r22","$c3r23",\
- "$c3r24","$c3r25","$c3r26","$c3r27","$c3r28","$c3r29","$c3r30","$c3r31"\
-}
-
/* If defined, a C initializer for an array of structures
containing a name and a register number. This macro defines
additional names for hard registers, thus allowing the `asm'
/* The CC_UNS mode is for an unsigned operands integer comparison using
the CMPU insn. Result values correspond to those in CCmode. */
-CC (CC_UNS)
+CC_MODE (CC_UNS);
/* The CC_FP mode is for a non-equality floating-point comparison, using
the FCMP or FCMPE insn. The result is (integer) -1 or 1 for
espectively a < b and a > b, otherwise 0. */
-CC (CC_FP)
+CC_MODE (CC_FP);
/* The CC_FPEQ mode is for an equality floating-point comparison, using
the FEQL or FEQLE insn. The result is (integer) 1 for a == b,
otherwise 0 (including NaN:s). */
-CC (CC_FPEQ)
+CC_MODE (CC_FPEQ);
/* The CC_FUN mode is for an ordering comparison, using the FUN or FUNE
insn. The result is (integer) 1 if a is unordered to b, otherwise the
result is 0. */
-CC (CC_FUN)
+CC_MODE (CC_FUN);
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
-/* Add any extra modes needed to represent the condition code.
-
- HPPA floating comparisons produce condition codes. */
-
-CC (CCFP)
-
+/* TFmode: IEEE quad floating point (software). */
+FLOAT_MODE (TF, 16, ieee_quad_format);
+/* HPPA floating comparisons produce distinct condition codes. */
+CC_MODE (CCFP);
/* Add any extra modes needed to represent the condition code.
CCFPmode is used for FPU, but should we use a separate reg? */
-CC (CCFP)
-
+CC_MODE (CCFP);
#undef FP_SAVE_INLINE
#define FP_SAVE_INLINE(FIRST_REG) ((FIRST_REG) < 64)
-/* Always use the "debug" register names, they're what the assembler
- wants to see. */
-
+/* The assembler wants the alternate register names, but without
+ leading percent sign. */
#undef REGISTER_NAMES
-#define REGISTER_NAMES DEBUG_REGISTER_NAMES
+#define REGISTER_NAMES \
+{ \
+ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
+ "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
+ "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \
+ "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", \
+ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
+ "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
+ "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", \
+ "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", \
+ "mq", "lr", "ctr", "ap", \
+ "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", \
+ "xer", \
+ "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", \
+ "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", \
+ "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", \
+ "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", \
+ "vrsave", "vscr", \
+ "spe_acc", "spefscr" \
+}
/* This outputs NAME to FILE. */
Free Software Foundation, 59 Temple Place - Suite 330, Boston,
MA 02111-1307, USA. */
+/* 128-bit floating point. ABI_V4 uses IEEE quad, AIX/Darwin
+ adjust this in rs6000_override_options. */
+FLOAT_MODE (TF, 16, ieee_quad_format);
+
+/* PSImode is used for the XER register. The XER register
+ is not used for anything; perhaps it should be deleted,
+ except that that would change register numbers. */
+PARTIAL_INT_MODE (SI);
+
/* Add any extra modes needed to represent the condition code.
For the RS/6000, we need separate modes when unsigned (logical) comparisons
use a mode for the case when we are comparing the results of two
comparisons, as then only the EQ bit is valid in the register. */
-CC (CCUNS)
-CC (CCFP)
-CC (CCEQ)
+CC_MODE (CCUNS);
+CC_MODE (CCFP);
+CC_MODE (CCEQ);
&rs6000_reg_names[112][0], /* spefscr */ \
}
-/* print-rtl can't handle the above REGISTER_NAMES, so define the
- following for it. Switch to use the alternate names since
- they are more mnemonic. */
-
-#define DEBUG_REGISTER_NAMES \
-{ \
- "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
- "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
- "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \
- "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", \
- "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
- "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
- "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", \
- "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", \
- "mq", "lr", "ctr", "ap", \
- "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", \
- "xer", \
- "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", \
- "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", \
- "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", \
- "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", \
- "vrsave", "vscr", \
- "spe_acc", "spefscr" \
-}
-
/* Table of additional register names to use in user input. */
#define ADDITIONAL_REGISTER_NAMES \
Software Foundation, 59 Temple Place - Suite 330, Boston, MA
02111-1307, USA. */
+/* 256-bit integer mode is needed for STACK_SAVEAREA_MODE. */
+INT_MODE (OI, 32);
+
/* Add any extra modes needed to represent the condition code. */
-CC (CCZ)
-CC (CCA)
-CC (CCAP)
-CC (CCAN)
-CC (CCL)
-CC (CCL1)
-CC (CCL2)
-CC (CCU)
-CC (CCUR)
-CC (CCS)
-CC (CCSR)
-CC (CCT)
-CC (CCT1)
-CC (CCT2)
-CC (CCT3)
+CC_MODE (CCZ);
+CC_MODE (CCA);
+CC_MODE (CCAP);
+CC_MODE (CCAN);
+CC_MODE (CCL);
+CC_MODE (CCL1);
+CC_MODE (CCL2);
+CC_MODE (CCU);
+CC_MODE (CCUR);
+CC_MODE (CCS);
+CC_MODE (CCSR);
+CC_MODE (CCT);
+CC_MODE (CCT1);
+CC_MODE (CCT2);
+CC_MODE (CCT3);
--- /dev/null
+/* Alpha extra machine modes.
+ Copyright (C) 2003 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING. If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA. */
+
+/* The SH uses a partial integer mode to represent the FPSCR register. */
+PARTIAL_INT_MODE (SI);
+
"rap" \
}
-#define DEBUG_REGISTER_NAMES SH_REGISTER_NAMES_INITIALIZER
-
#define REGNAMES_ARR_INDEX_1(index) \
(sh_register_names[index])
#define REGNAMES_ARR_INDEX_2(index) \
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
+/* 128-bit floating point */
+FLOAT_MODE (TF, 16, ieee_quad_format);
+
/* Add any extra modes needed to represent the condition code.
On the SPARC, we have a "no-overflow" mode which is used when an add or
CCXmode and CCX_NOOVmode are only used by v9. */
-CC (CCX)
-CC (CC_NOOV)
-CC (CCX_NOOV)
-CC (CCFP)
-CC (CCFPE)
-
+CC_MODE (CCX);
+CC_MODE (CC_NOOV);
+CC_MODE (CCX_NOOV);
+CC_MODE (CCFP);
+CC_MODE (CCFPE);
sparc_mode_class[i] = 0;
break;
case MODE_CC:
- default:
- /* mode_class hasn't been initialized yet for EXTRA_CC_MODES, so
- we must explicitly check for them here. */
if (i == (int) CCFPmode || i == (int) CCFPEmode)
sparc_mode_class[i] = 1 << (int) CCFP_MODE;
- else if (i == (int) CCmode || i == (int) CC_NOOVmode
- || i == (int) CCXmode || i == (int) CCX_NOOVmode)
- sparc_mode_class[i] = 1 << (int) CC_MODE;
else
- sparc_mode_class[i] = 0;
+ sparc_mode_class[i] = 1 << (int) CC_MODE;
+ break;
+ default:
+ sparc_mode_class[i] = 0;
break;
}
}
--- /dev/null
+/* VAX extra machine modes.
+ Copyright (C) 2003 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING. If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA. */
+
+/* We just need to reset the floating point formats. */
+RESET_FLOAT_FORMAT (SF, vax_f_format);
+RESET_FLOAT_FORMAT (DF, vax_d_format);
override_options (void)
{
/* We're VAX floating point, not IEEE floating point. */
- memset (real_format_for_mode, 0, sizeof real_format_for_mode);
- REAL_MODE_FORMAT (SFmode) = &vax_f_format;
- REAL_MODE_FORMAT (DFmode) = (TARGET_G_FLOAT ? &vax_g_format : &vax_d_format);
+ if (TARGET_G_FLOAT)
+ REAL_MODE_FORMAT (DFmode) = &vax_g_format;
}
/* Generate the assembly code for function entry. FILE is a stdio
cat >> confdefs.h <<EOF
#define EXTRA_MODES_FILE "config/$extra_modes"
-EOF
-
- cat >> confdefs.h <<\EOF
-#define EXTRA_CC_MODES 1
EOF
fi
. ../intl/config.intl
fi
echo $ac_n "checking whether NLS is requested""... $ac_c" 1>&6
-echo "configure:5390: checking whether NLS is requested" >&5
+echo "configure:5386: checking whether NLS is requested" >&5
if test x"$USE_NLS" != xyes; then
echo "$ac_t""no" 1>&6
else
echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6
-echo "configure:5401: checking for catalogs to be installed" >&5
+echo "configure:5397: checking for catalogs to be installed" >&5
# Look for .po and .gmo files in the source directory.
CATALOGS=
XLINGUAS=
case $host_os in
win32 | pe | cygwin* | mingw32* | uwin*)
echo $ac_n "checking whether windows registry support is requested""... $ac_c" 1>&6
-echo "configure:5451: checking whether windows registry support is requested" >&5
+echo "configure:5447: checking whether windows registry support is requested" >&5
if test "x$enable_win32_registry" != xno; then
cat >> confdefs.h <<\EOF
#define ENABLE_WIN32_REGISTRY 1
echo "$ac_t""yes" 1>&6
echo $ac_n "checking for library containing RegOpenKeyExA""... $ac_c" 1>&6
-echo "configure:5460: checking for library containing RegOpenKeyExA" >&5
+echo "configure:5456: checking for library containing RegOpenKeyExA" >&5
if eval "test \"`echo '$''{'ac_cv_search_RegOpenKeyExA'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
ac_func_search_save_LIBS="$LIBS"
ac_cv_search_RegOpenKeyExA="no"
cat > conftest.$ac_ext <<EOF
-#line 5467 "configure"
+#line 5463 "configure"
#include "confdefs.h"
/* Override any gcc2 internal prototype to avoid an error. */
/* We use char because int might match the return type of a gcc2
RegOpenKeyExA()
; return 0; }
EOF
-if { (eval echo configure:5478: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:5474: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
ac_cv_search_RegOpenKeyExA="none required"
else
test "$ac_cv_search_RegOpenKeyExA" = "no" && for i in advapi32; do
LIBS="-l$i $ac_func_search_save_LIBS"
cat > conftest.$ac_ext <<EOF
-#line 5489 "configure"
+#line 5485 "configure"
#include "confdefs.h"
/* Override any gcc2 internal prototype to avoid an error. */
/* We use char because int might match the return type of a gcc2
RegOpenKeyExA()
; return 0; }
EOF
-if { (eval echo configure:5500: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:5496: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
ac_cv_search_RegOpenKeyExA="-l$i"
break
if test "x$enable_win32_registry" != xno; then
echo $ac_n "checking registry key on windows hosts""... $ac_c" 1>&6
-echo "configure:5542: checking registry key on windows hosts" >&5
+echo "configure:5538: checking registry key on windows hosts" >&5
cat >> confdefs.h <<EOF
#define WIN32_REGISTRY_KEY "$gcc_cv_win32_registry_key"
EOF
# build->target assembler and hope that it will have the same features
# as the host->target assembler we'll be using.
echo $ac_n "checking what assembler to use""... $ac_c" 1>&6
-echo "configure:5806: checking what assembler to use" >&5
+echo "configure:5802: checking what assembler to use" >&5
in_tree_gas=no
gcc_cv_as=
gcc_cv_gas_major_version=
# build->target linker and hope that it will have the same features
# as the host->target linker we'll be using.
echo $ac_n "checking what linker to use""... $ac_c" 1>&6
-echo "configure:5930: checking what linker to use" >&5
+echo "configure:5926: checking what linker to use" >&5
in_tree_ld=no
gcc_cv_ld=
gcc_cv_gld_major_version=
# Figure out what nm we will be using.
gcc_cv_binutils_srcdir=`echo $srcdir | sed -e 's,/gcc$,,'`/binutils
echo $ac_n "checking what nm to use""... $ac_c" 1>&6
-echo "configure:6038: checking what nm to use" >&5
+echo "configure:6034: checking what nm to use" >&5
in_tree_nm=no
if test -x nm$host_exeext; then
gcc_cv_nm=./nm$host_exeext
# Figure out what objdump we will be using.
echo $ac_n "checking what objdump to use""... $ac_c" 1>&6
-echo "configure:6061: checking what objdump to use" >&5
+echo "configure:6057: checking what objdump to use" >&5
in_tree_objdump=no
if test -x objdump$host_exeext; then
gcc_cv_objdump=./objdump$host_exeext
# Figure out what assembler alignment features are present.
echo $ac_n "checking assembler for .balign and .p2align""... $ac_c" 1>&6
-echo "configure:6086: checking assembler for .balign and .p2align" >&5
+echo "configure:6082: checking assembler for .balign and .p2align" >&5
if eval "test \"`echo '$''{'gcc_cv_as_balign_and_p2align'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
elif test x$gcc_cv_as != x; then
echo '.balign 4
.p2align 2' > conftest.s
- if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:6098: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
+ if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:6094: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
then
gcc_cv_as_balign_and_p2align=yes
else
fi
echo $ac_n "checking assembler for .p2align with maximum skip""... $ac_c" 1>&6
-echo "configure:6118: checking assembler for .p2align with maximum skip" >&5
+echo "configure:6114: checking assembler for .p2align with maximum skip" >&5
if eval "test \"`echo '$''{'gcc_cv_as_max_skip_p2align'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
fi
elif test x$gcc_cv_as != x; then
echo '.p2align 4,,7' > conftest.s
- if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:6129: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
+ if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:6125: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
then
gcc_cv_as_max_skip_p2align=yes
else
fi
echo $ac_n "checking assembler for working .subsection -1""... $ac_c" 1>&6
-echo "configure:6149: checking assembler for working .subsection -1" >&5
+echo "configure:6145: checking assembler for working .subsection -1" >&5
if eval "test \"`echo '$''{'gcc_cv_as_subsection_m1'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
.subsection -1
conftest_label2: .word 0
.previous' > conftest.s
- if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:6164: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
+ if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:6160: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
then
if test x$gcc_cv_nm != x; then
$gcc_cv_nm conftest.o | grep conftest_label1 > conftest.nm1
fi
echo $ac_n "checking assembler for .weak""... $ac_c" 1>&6
-echo "configure:6192: checking assembler for .weak" >&5
+echo "configure:6188: checking assembler for .weak" >&5
if eval "test \"`echo '$''{'gcc_cv_as_weak'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
fi
elif test x$gcc_cv_as != x; then
echo ' .weak foobar' > conftest.s
- if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:6203: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
+ if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:6199: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
then
gcc_cv_as_weak=yes
else
# to be safe.
# The gcc_GAS_CHECK_FEATURE call just sets a cache variable.
echo $ac_n "checking assembler for .hidden""... $ac_c" 1>&6
-echo "configure:6230: checking assembler for .hidden" >&5
+echo "configure:6226: checking assembler for .hidden" >&5
if eval "test \"`echo '$''{'gcc_cv_as_hidden'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
elif test x$gcc_cv_as != x; then
echo ' .hidden foobar
foobar:' > conftest.s
- if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:6243: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
+ if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:6239: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
then
gcc_cv_as_hidden=yes
else
echo $ac_n "checking linker for .hidden support""... $ac_c" 1>&6
-echo "configure:6258: checking linker for .hidden support" >&5
+echo "configure:6254: checking linker for .hidden support" >&5
if eval "test \"`echo '$''{'gcc_cv_ld_hidden'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Check if we have .[us]leb128, and support symbol arithmetic with it.
echo $ac_n "checking assembler for .sleb128 and .uleb128""... $ac_c" 1>&6
-echo "configure:6321: checking assembler for .sleb128 and .uleb128" >&5
+echo "configure:6317: checking assembler for .sleb128 and .uleb128" >&5
if eval "test \"`echo '$''{'gcc_cv_as_leb128'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
.uleb128 1280
.sleb128 -1010
L2:' > conftest.s
- if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:6338: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
+ if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:6334: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
then
# GAS versions before 2.11 do not support uleb128,
# despite appearing to.
# GAS versions up to and including 2.11.0 may mis-optimize
# .eh_frame data.
echo $ac_n "checking assembler for eh_frame optimization""... $ac_c" 1>&6
-echo "configure:6374: checking assembler for eh_frame optimization" >&5
+echo "configure:6370: checking assembler for eh_frame optimization" >&5
if eval "test \"`echo '$''{'gcc_cv_as_eh_frame'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
.byte 0x4
.4byte .L1-.LFB1
.LEFDE1:' > conftest.s
- if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:6417: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
+ if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:6413: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
then
cat > conftest.lit <<EOF
0000 10000000 00000000 017a0001 781a0004 .........z..x...
|| cmp conftest.big conftest.got > /dev/null 2>&1; }
then
gcc_cv_as_eh_frame=yes
- elif { ac_try='$gcc_cv_as -o conftest.o --traditional-format /dev/null'; { (eval echo configure:6438: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }; then
+ elif { ac_try='$gcc_cv_as -o conftest.o --traditional-format /dev/null'; { (eval echo configure:6434: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }; then
gcc_cv_as_eh_frame=buggy
else
# Uh oh, what do we do now?
fi
echo $ac_n "checking assembler for section merging support""... $ac_c" 1>&6
-echo "configure:6463: checking assembler for section merging support" >&5
+echo "configure:6459: checking assembler for section merging support" >&5
if eval "test \"`echo '$''{'gcc_cv_as_shf_merge'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
fi
elif test x$gcc_cv_as != x; then
echo '.section .rodata.str, "aMS", @progbits, 1' > conftest.s
- if { ac_try='$gcc_cv_as --fatal-warnings -o conftest.o conftest.s >&5'; { (eval echo configure:6475: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
+ if { ac_try='$gcc_cv_as --fatal-warnings -o conftest.o conftest.s >&5'; { (eval echo configure:6471: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
then
gcc_cv_as_shf_merge=yes
else
: # If we don't have a check, assume no support.
else
echo $ac_n "checking assembler for thread-local storage support""... $ac_c" 1>&6
-echo "configure:6713: checking assembler for thread-local storage support" >&5
+echo "configure:6709: checking assembler for thread-local storage support" >&5
if eval "test \"`echo '$''{'gcc_cv_as_tls'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
fi
elif test x$gcc_cv_as != x; then
echo "$conftest_s" > conftest.s
- if { ac_try='$gcc_cv_as $tls_as_opt --fatal-warnings -o conftest.o conftest.s >&5'; { (eval echo configure:6724: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
+ if { ac_try='$gcc_cv_as $tls_as_opt --fatal-warnings -o conftest.o conftest.s >&5'; { (eval echo configure:6720: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
then
gcc_cv_as_tls=yes
else
# All TARGET_ABI_OSF targets.
alpha*-*-osf* | alpha*-*-linux* | alpha*-*-*bsd*)
echo $ac_n "checking assembler for explicit relocation support""... $ac_c" 1>&6
-echo "configure:6750: checking assembler for explicit relocation support" >&5
+echo "configure:6746: checking assembler for explicit relocation support" >&5
if eval "test \"`echo '$''{'gcc_cv_as_alpha_explicit_relocs'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
ldah $1, d($29) !gprelhigh
lda $1, d($1) !gprellow
lda $29, 0($29) !gpdisp!3' > conftest.s
- if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:6773: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
+ if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:6769: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
then
gcc_cv_as_alpha_explicit_relocs=yes
else
sparc*-*-*)
echo $ac_n "checking assembler for .register""... $ac_c" 1>&6
-echo "configure:6795: checking assembler for .register" >&5
+echo "configure:6791: checking assembler for .register" >&5
if eval "test \"`echo '$''{'gcc_cv_as_sparc_register_op'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
gcc_cv_as_sparc_register_op=no
if test x$gcc_cv_as != x; then
echo '.register %g2, #scratch' > conftest.s
- if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:6802: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
+ if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:6798: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
then
gcc_cv_as_sparc_register_op=yes
else
fi
echo $ac_n "checking assembler for -relax option""... $ac_c" 1>&6
-echo "configure:6822: checking assembler for -relax option" >&5
+echo "configure:6818: checking assembler for -relax option" >&5
if eval "test \"`echo '$''{'gcc_cv_as_sparc_relax'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
gcc_cv_as_sparc_relax=no
if test x$gcc_cv_as != x; then
echo '.text' > conftest.s
- if { ac_try='$gcc_cv_as -relax -o conftest.o conftest.s >&5'; { (eval echo configure:6829: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
+ if { ac_try='$gcc_cv_as -relax -o conftest.o conftest.s >&5'; { (eval echo configure:6825: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
then
gcc_cv_as_sparc_relax=yes
else
fi
echo $ac_n "checking assembler for unaligned pcrel relocs""... $ac_c" 1>&6
-echo "configure:6849: checking assembler for unaligned pcrel relocs" >&5
+echo "configure:6845: checking assembler for unaligned pcrel relocs" >&5
if eval "test \"`echo '$''{'gcc_cv_as_sparc_ua_pcrel'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
.align 4
.byte 0
.uaword %r_disp32(foo)' > conftest.s
- if { ac_try='$gcc_cv_as -K PIC -o conftest.o conftest.s >&5'; { (eval echo configure:6862: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
+ if { ac_try='$gcc_cv_as -K PIC -o conftest.o conftest.s >&5'; { (eval echo configure:6858: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
then
if test x$gcc_cv_ld != x \
&& $gcc_cv_ld -o conftest conftest.o -G > /dev/null 2>&1; then
echo $ac_n "checking assembler for unaligned pcrel relocs against hidden symbols""... $ac_c" 1>&6
-echo "configure:6885: checking assembler for unaligned pcrel relocs against hidden symbols" >&5
+echo "configure:6881: checking assembler for unaligned pcrel relocs against hidden symbols" >&5
if eval "test \"`echo '$''{'gcc_cv_as_sparc_ua_pcrel_hidden'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
.hidden foo
foo:
.skip 4' > conftest.s
- if { ac_try='$gcc_cv_as -K PIC -o conftest.o conftest.s >&5'; { (eval echo configure:6900: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
+ if { ac_try='$gcc_cv_as -K PIC -o conftest.o conftest.s >&5'; { (eval echo configure:6896: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
then
if test x$gcc_cv_ld != x && test x$gcc_cv_objdump != x \
&& $gcc_cv_ld -o conftest conftest.o -G > /dev/null 2>&1 \
fi # unaligned pcrel relocs
echo $ac_n "checking assembler for offsetable %lo()""... $ac_c" 1>&6
-echo "configure:6933: checking assembler for offsetable %lo()" >&5
+echo "configure:6929: checking assembler for offsetable %lo()" >&5
if eval "test \"`echo '$''{'gcc_cv_as_sparc_offsetable_lo10'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
echo '.text
or %g1, %lo(ab) + 12, %g1
or %g1, %lo(ab + 12), %g1' > conftest.s
- if { ac_try='$gcc_cv_as -xarch=v9 -o conftest.o conftest.s >&5'; { (eval echo configure:6942: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
+ if { ac_try='$gcc_cv_as -xarch=v9 -o conftest.o conftest.s >&5'; { (eval echo configure:6938: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
then
if test x$gcc_cv_objdump != x \
&& %gcc_cv_objdump -s -j .text conftest.o 2> /dev/null \
i[34567]86-*-* | x86_64-*-*)
echo $ac_n "checking assembler for filds and fists mnemonics""... $ac_c" 1>&6
-echo "configure:6968: checking assembler for filds and fists mnemonics" >&5
+echo "configure:6964: checking assembler for filds and fists mnemonics" >&5
if eval "test \"`echo '$''{'gcc_cv_as_ix86_filds_fists'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
fi
elif test x$gcc_cv_as != x; then
echo 'filds mem; fists mem' > conftest.s
- if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:6979: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
+ if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:6975: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
then
gcc_cv_as_ix86_filds_fists=yes
else
fi
echo $ac_n "checking assembler for cmov syntax""... $ac_c" 1>&6
-echo "configure:6999: checking assembler for cmov syntax" >&5
+echo "configure:6995: checking assembler for cmov syntax" >&5
if eval "test \"`echo '$''{'gcc_cv_as_ix86_cmov_sun_syntax'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
gcc_cv_as_ix86_cmov_sun_syntax=no
if test x$gcc_cv_as != x; then
echo 'cmovl.l %edx, %eax' > conftest.s
- if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:7006: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
+ if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:7002: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
then
gcc_cv_as_ix86_cmov_sun_syntax=yes
else
# This one is used unconditionally by i386.[ch]; it is to be defined
# to 1 if the feature is present, 0 otherwise.
echo $ac_n "checking assembler for GOTOFF in data""... $ac_c" 1>&6
-echo "configure:7028: checking assembler for GOTOFF in data" >&5
+echo "configure:7024: checking assembler for GOTOFF in data" >&5
if eval "test \"`echo '$''{'gcc_cv_as_ix86_gotoff_in_data'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
nop
.data
.long .L0@GOTOFF' > conftest.s
- if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:7043: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
+ if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:7039: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
then
gcc_cv_as_ix86_gotoff_in_data=yes
else
ia64*-*-*)
echo $ac_n "checking assembler for ltoffx and ldxmov relocs""... $ac_c" 1>&6
-echo "configure:7064: checking assembler for ltoffx and ldxmov relocs" >&5
+echo "configure:7060: checking assembler for ltoffx and ldxmov relocs" >&5
if eval "test \"`echo '$''{'gcc_cv_as_ia64_ltoffx_ldxmov_relocs'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
addl r15 = @ltoffx(x#), gp
;;
ld8.mov r16 = [r15], x#' > conftest.s
- if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:7078: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
+ if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:7074: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
then
gcc_cv_as_ia64_ltoffx_ldxmov_relocs=yes
else
mfcr 3,128"
echo $ac_n "checking assembler for mfcr field support""... $ac_c" 1>&6
-echo "configure:7108: checking assembler for mfcr field support" >&5
+echo "configure:7104: checking assembler for mfcr field support" >&5
if eval "test \"`echo '$''{'gcc_cv_as_powerpc_mfcrf'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
fi
elif test x$gcc_cv_as != x; then
echo "$conftest_s" > conftest.s
- if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:7119: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
+ if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:7115: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
then
gcc_cv_as_powerpc_mfcrf=yes
else
mips*-*-*)
echo $ac_n "checking assembler for explicit relocation support""... $ac_c" 1>&6
-echo "configure:7141: checking assembler for explicit relocation support" >&5
+echo "configure:7137: checking assembler for explicit relocation support" >&5
if eval "test \"`echo '$''{'gcc_cv_as_mips_explicit_relocs'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
fi
elif test x$gcc_cv_as != x; then
echo ' lw $4,%gp_rel(foo)($4)' > conftest.s
- if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:7152: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
+ if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:7148: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
then
gcc_cv_as_mips_explicit_relocs=yes
else
.loc 1 3 0
$insn"
echo $ac_n "checking assembler for dwarf2 debug_line support""... $ac_c" 1>&6
-echo "configure:7198: checking assembler for dwarf2 debug_line support" >&5
+echo "configure:7194: checking assembler for dwarf2 debug_line support" >&5
if eval "test \"`echo '$''{'gcc_cv_as_dwarf2_debug_line'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
fi
elif test x$gcc_cv_as != x; then
echo "$conftest_s" > conftest.s
- if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:7210: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
+ if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:7206: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
then
# ??? This fails with non-gnu grep. Maybe use objdump?
if grep debug_line conftest.o > /dev/null 2>&1; then
# by DW_AT_decl_file. Approximate this test by testing if
# the assembler bitches if the same index is assigned twice.
echo $ac_n "checking assembler for buggy dwarf2 .file directive""... $ac_c" 1>&6
-echo "configure:7232: checking assembler for buggy dwarf2 .file directive" >&5
+echo "configure:7228: checking assembler for buggy dwarf2 .file directive" >&5
if eval "test \"`echo '$''{'gcc_cv_as_dwarf2_file_buggy'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
if test x$gcc_cv_as != x; then
echo ' .file 1 "foo.s"
.file 1 "bar.s"' > conftest.s
- if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:7240: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
+ if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'; { (eval echo configure:7236: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
then
gcc_cv_as_dwarf2_file_buggy=yes
else
fi
echo $ac_n "checking assembler for --gdwarf2 option""... $ac_c" 1>&6
-echo "configure:7263: checking assembler for --gdwarf2 option" >&5
+echo "configure:7259: checking assembler for --gdwarf2 option" >&5
if eval "test \"`echo '$''{'gcc_cv_as_gdwarf2_flag'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
fi
elif test x$gcc_cv_as != x; then
echo "$insn" > conftest.s
- if { ac_try='$gcc_cv_as --gdwarf2 -o conftest.o conftest.s >&5'; { (eval echo configure:7275: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
+ if { ac_try='$gcc_cv_as --gdwarf2 -o conftest.o conftest.s >&5'; { (eval echo configure:7271: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
then
gcc_cv_as_gdwarf2_flag=yes
else
fi
echo $ac_n "checking assembler for --gstabs option""... $ac_c" 1>&6
-echo "configure:7295: checking assembler for --gstabs option" >&5
+echo "configure:7291: checking assembler for --gstabs option" >&5
if eval "test \"`echo '$''{'gcc_cv_as_gstabs_flag'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
fi
elif test x$gcc_cv_as != x; then
echo "$insn" > conftest.s
- if { ac_try='$gcc_cv_as --gstabs -o conftest.o conftest.s >&5'; { (eval echo configure:7307: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
+ if { ac_try='$gcc_cv_as --gstabs -o conftest.o conftest.s >&5'; { (eval echo configure:7303: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
then
# The native Solaris 9/Intel assembler doesn't understand --gstabs
# and warns about it, but still exits successfully. So check for
# this.
- if { ac_try='$gcc_cv_as --gstabs -o conftest.o conftest.s 2>&1 | grep -i warning > /dev/null'; { (eval echo configure:7312: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
+ if { ac_try='$gcc_cv_as --gstabs -o conftest.o conftest.s 2>&1 | grep -i warning > /dev/null'; { (eval echo configure:7308: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; }
then :
else gcc_cv_as_gstabs_flag=yes
fi
fi
echo $ac_n "checking linker read-only and read-write section mixing""... $ac_c" 1>&6
-echo "configure:7334: checking linker read-only and read-write section mixing" >&5
+echo "configure:7330: checking linker read-only and read-write section mixing" >&5
gcc_cv_ld_ro_rw_mix=unknown
if test $in_tree_ld = yes ; then
if test "$gcc_cv_gld_major_version" -eq 2 -a "$gcc_cv_gld_minor_version" -ge 10 -o "$gcc_cv_gld_major_version" -gt 2 \
echo "$ac_t""$gcc_cv_ld_ro_rw_mix" 1>&6
echo $ac_n "checking linker PT_GNU_EH_FRAME support""... $ac_c" 1>&6
-echo "configure:7373: checking linker PT_GNU_EH_FRAME support" >&5
+echo "configure:7369: checking linker PT_GNU_EH_FRAME support" >&5
gcc_cv_ld_eh_frame_hdr=no
if test $in_tree_ld = yes ; then
if test "$gcc_cv_gld_major_version" -eq 2 -a "$gcc_cv_gld_minor_version" -ge 12 -o "$gcc_cv_gld_major_version" -gt 2 \
echo "$ac_t""$gcc_cv_ld_eh_frame_hdr" 1>&6
echo $ac_n "checking linker position independent executable support""... $ac_c" 1>&6
-echo "configure:7395: checking linker position independent executable support" >&5
+echo "configure:7391: checking linker position independent executable support" >&5
gcc_cv_ld_pie=no
if test $in_tree_ld = yes ; then
if test "$gcc_cv_gld_major_version" -eq 2 -a "$gcc_cv_gld_minor_version" -ge 15 -o "$gcc_cv_gld_major_version" -gt 2 \
case "$target" in
mips*-*-*)
echo $ac_n "checking whether libgloss uses STARTUP directives consistently""... $ac_c" 1>&6
-echo "configure:7420: checking whether libgloss uses STARTUP directives consistently" >&5
+echo "configure:7416: checking whether libgloss uses STARTUP directives consistently" >&5
gcc_cv_mips_libgloss_startup=no
gcc_cv_libgloss_srcdir=`echo $srcdir | sed -e 's,/gcc$,,'`/libgloss
if test "x$exec_prefix" = xNONE; then
echo $ac_n "checking whether to enable maintainer-specific portions of Makefiles""... $ac_c" 1>&6
-echo "configure:7622: checking whether to enable maintainer-specific portions of Makefiles" >&5
+echo "configure:7618: checking whether to enable maintainer-specific portions of Makefiles" >&5
# Check whether --enable-maintainer-mode or --disable-maintainer-mode was given.
if test "${enable_maintainer_mode+set}" = set; then
enableval="$enable_maintainer_mode"
AC_DEFINE_UNQUOTED(EXTRA_MODES_FILE, "config/$extra_modes",
[Define to the name of a file containing a list of extra machine modes
for this architecture.])
- AC_DEFINE(EXTRA_CC_MODES, 1,
- [Define if the target architecture needs extra machine modes to represent
- the results of comparisons.])
fi
# auto-host.h is the file containing items generated by autoconf and is
#define STACK_POINTER_OFFSET 0
#endif
+/* How to print out a register name. */
+#ifndef PRINT_REG
+#define PRINT_REG(RTX, CODE, FILE) \
+ fprintf ((FILE), "%s", reg_names[REGNO (RTX)])
+#endif
+
#endif /* ! GCC_DEFAULTS_H */
two places, the @file{md} file and in @code{NOTICE_UPDATE_CC}.
@end defmac
-@defmac EXTRA_CC_MODES
-Condition codes are represented in registers by machine modes of class
-@code{MODE_CC}. By default, there is just one mode, @code{CCmode}, with
-this class. If you need more such modes, create a file named
-@file{@var{machine}-modes.def} in your @file{config/@var{machine}}
-directory (@pxref{Back End, , Anatomy of a Target Back End}), containing
-a list of these modes. Each entry in the list should be a call to the
-macro @code{CC}. This macro takes one argument, which is the name of
-the mode: it should begin with @samp{CC}. Do not put quotation marks
-around the name, or include the trailing @samp{mode}; these are
-automatically added. There should not be anything else in the file
-except comments.
-
-A sample @file{@var{machine}-modes.def} file might look like this:
-
-@smallexample
-CC (CC_NOOV) /* @r{Comparison only valid if there was no overflow.} */
-CC (CCFP) /* @r{Floating point comparison that cannot trap.} */
-CC (CCFPE) /* @r{Floating point comparison that may trap.} */
-@end smallexample
-
-When you create this file, the macro @code{EXTRA_CC_MODES} is
-automatically defined by @command{configure}, with value @samp{1}.
-@end defmac
-
@defmac SELECT_CC_MODE (@var{op}, @var{x}, @var{y})
Returns a mode from class @code{MODE_CC} to be used when comparison
operation code @var{op} is applied to rtx @var{x} and @var{y}. For
? CC_NOOVmode : CCmode))
@end smallexample
-You need not define this macro if @code{EXTRA_CC_MODES} is not defined.
+You should define this macro if and only if you define extra CC modes
+in @file{@var{machine}-modes.def}.
@end defmac
@defmac CANONICALIZE_COMPARISON (@var{code}, @var{op0}, @var{op1})
#define ASM_COMMENT_START ";#"
#endif
-/* How to print out a register name. */
-#ifndef PRINT_REG
-#define PRINT_REG(RTX, CODE, FILE) \
- fprintf ((FILE), "%s", reg_names[REGNO (RTX)])
-#endif
-
/* Define a macro which returns nonzero for any tagged type which is
used (directly or indirectly) in the specification of either some
function's return type or some formal parameter of some function.
unsigned int bytesize; /* storage size in addressable units */
unsigned int ncomponents; /* number of subunits */
unsigned int alignment; /* mode alignment */
+ const char *format; /* floating point format - MODE_FLOAT only */
struct mode_data *component; /* mode of components */
struct mode_data *wider; /* next wider mode */
static const struct mode_data blank_mode = {
0, "<unknown>", MAX_MODE_CLASS,
-1, -1, -1, -1,
- 0, 0,
+ 0, 0, 0,
"<unknown>", 0
};
enum requirement r_bitsize,
enum requirement r_bytesize,
enum requirement r_component,
- enum requirement r_ncomponents)
+ enum requirement r_ncomponents,
+ enum requirement r_format)
{
validate_field (m, bitsize);
validate_field (m, bytesize);
validate_field (m, component);
validate_field (m, ncomponents);
+ validate_field (m, format);
}
#undef validate_field
#undef validate_field_
if (!strcmp (m->name, "VOID"))
void_mode = m;
- validate_mode (m, UNSET, UNSET, UNSET, UNSET);
+ validate_mode (m, UNSET, UNSET, UNSET, UNSET, UNSET);
m->bitsize = 0;
m->bytesize = 0;
case MODE_CC:
/* Again, nothing more need be said. For historical reasons,
the size of a CC mode is four units. */
- validate_mode (m, UNSET, UNSET, UNSET, UNSET);
+ validate_mode (m, UNSET, UNSET, UNSET, UNSET, UNSET);
m->bytesize = 4;
m->ncomponents = 0;
case MODE_INT:
case MODE_FLOAT:
/* A scalar mode must have a byte size, may have a bit size,
- and must not have components. */
- validate_mode (m, OPTIONAL, SET, UNSET, UNSET);
+ and must not have components. A float mode must have a
+ format. */
+ validate_mode (m, OPTIONAL, SET, UNSET, UNSET,
+ m->class == MODE_FLOAT ? SET : UNSET);
m->ncomponents = 0;
m->component = 0;
/* A partial integer mode uses ->component to say what the
corresponding full-size integer mode is, and may also
specify a bit size. */
- validate_mode (m, OPTIONAL, UNSET, SET, UNSET);
+ validate_mode (m, OPTIONAL, UNSET, SET, UNSET, UNSET);
m->bytesize = m->component->bytesize;
case MODE_COMPLEX_INT:
case MODE_COMPLEX_FLOAT:
/* Complex modes should have a component indicated, but no more. */
- validate_mode (m, UNSET, UNSET, SET, UNSET);
+ validate_mode (m, UNSET, UNSET, SET, UNSET, UNSET);
m->ncomponents = 2;
if (m->component->bitsize != (unsigned int)-1)
m->bitsize = 2 * m->component->bitsize;
case MODE_VECTOR_INT:
case MODE_VECTOR_FLOAT:
/* Vector modes should have a component and a number of components. */
- validate_mode (m, UNSET, UNSET, SET, SET);
+ validate_mode (m, UNSET, UNSET, SET, SET, UNSET);
if (m->component->bitsize != (unsigned int)-1)
m->bitsize = m->ncomponents * m->component->bitsize;
m->bytesize = m->ncomponents * m->component->bytesize;
new_mode (class, name, file, line);
}
-#define _SCALAR_MODE(C, N, B, Y) \
- make_scalar_mode (MODE_##C, #N, B, Y, __FILE__, __LINE__)
+#define INT_MODE(N, Y) FRACTIONAL_INT_MODE (N, -1, Y)
+#define FRACTIONAL_INT_MODE(N, B, Y) \
+ make_int_mode (#N, B, Y, __FILE__, __LINE__)
-#define INT_MODE(N, Y) _SCALAR_MODE (INT, N, -1, Y)
-#define FRACTIONAL_INT_MODE(N, B, Y) _SCALAR_MODE (INT, N, B, Y)
-#define FLOAT_MODE(N, Y) _SCALAR_MODE (FLOAT, N, -1, Y)
-#define FRACTIONAL_FLOAT_MODE(N, B, Y) _SCALAR_MODE (FLOAT, N, B, Y)
+static void
+make_int_mode (const char *name,
+ unsigned int bitsize, unsigned int bytesize,
+ const char *file, unsigned int line)
+{
+ struct mode_data *m = new_mode (MODE_INT, name, file, line);
+ m->bytesize = bytesize;
+ m->bitsize = bitsize;
+}
+
+#define FLOAT_MODE(N, Y, F) FRACTIONAL_FLOAT_MODE (N, -1, Y, F)
+#define FRACTIONAL_FLOAT_MODE(N, B, Y, F) \
+ make_float_mode (#N, B, Y, #F, __FILE__, __LINE__)
static void
-make_scalar_mode (enum mode_class class, const char *name,
- unsigned int bitsize, unsigned int bytesize,
- const char *file, unsigned int line)
+make_float_mode (const char *name,
+ unsigned int bitsize, unsigned int bytesize,
+ const char *format,
+ const char *file, unsigned int line)
{
- struct mode_data *m = new_mode (class, name, file, line);
+ struct mode_data *m = new_mode (MODE_FLOAT, name, file, line);
m->bytesize = bytesize;
m->bitsize = bitsize;
+ m->format = format;
+}
+
+#define RESET_FLOAT_FORMAT(N, F) \
+ reset_float_format (#N, #F, __FILE__, __LINE__)
+static void ATTRIBUTE_UNUSED
+reset_float_format (const char *name, const char *format,
+ const char *file, const char *line)
+{
+ struct mode_data *m = find_mode (MODE_FLOAT, name);
+ if (!m)
+ {
+ error ("%s:%d: no mode \"%s\" in class FLOAT", file, line, name);
+ return;
+ }
+ m->format = format;
}
/* Partial integer modes are specified by relation to a full integer mode.
puts ("\
by genmodes. */\n\
\n\
-#define GENERATOR_FILE /* This inhibits insn-flags.h and\n\
- insn-constants.h, which don't exist yet. */\n\
#include \"config.h\"\n\
#include \"system.h\"\n\
#include \"coretypes.h\"\n\
#include \"tm.h\"\n\
+#include \"machmode.h\"\n\
+#include \"real.h\"");
+}
+
+static void
+emit_min_insn_modes_c_header (void)
+{
+ printf ("/* Generated automatically from machmode.def%s%s\n",
+ HAVE_EXTRA_MODES ? " and " : "",
+ EXTRA_MODES_FILE);
+
+ puts ("\
+ by genmodes. */\n\
+\n\
+#include \"bconfig.h\"\n\
+#include \"system.h\"\n\
#include \"machmode.h\"");
}
print_closer ();
}
+static void
+emit_real_format_for_mode (void)
+{
+ struct mode_data *m;
+
+ /* This will produce a table which is not constant, but points to
+ entities that are constant, which is what we want. */
+ print_decl ("struct real_format *\n ", "real_format_for_mode",
+ "MAX_MODE_FLOAT - MIN_MODE_FLOAT + 1");
+
+ for (m = known_modes[MODE_FLOAT]; m; m = m->next)
+ if (!strcmp (m->format, "0"))
+ tagged_printf ("%s", m->format, m->name);
+ else
+ tagged_printf ("&%s", m->format, m->name);
+
+ print_closer ();
+}
+
static void
emit_insn_modes_c (void)
{
emit_mode_inner ();
emit_mode_base_align ();
emit_class_narrowest_mode ();
+ emit_real_format_for_mode ();
+}
+
+static void
+emit_min_insn_modes_c (void)
+{
+ emit_min_insn_modes_c_header ();
+ emit_mode_name ();
+ emit_mode_class ();
+ emit_mode_wider ();
+ emit_class_narrowest_mode ();
}
/* Master control. */
int
main(int argc, char **argv)
{
- bool gen_header;
+ bool gen_header = false, gen_min = false;
progname = argv[0];
if (argc == 1)
- gen_header = false;
+ ;
else if (argc == 2 && !strcmp (argv[1], "-h"))
gen_header = true;
+ else if (argc == 2 && !strcmp (argv[1], "-m"))
+ gen_min = true;
else
{
- error ("usage: %s [-h] > file", progname);
+ error ("usage: %s [-h|-m] > file", progname);
return FATAL_EXIT_CODE;
}
if (gen_header)
emit_insn_modes_h ();
+ else if (gen_min)
+ emit_min_insn_modes_c ();
else
emit_insn_modes_c ();
case 'b':
/* This loop will stop at the first prefix match, so
look through the modes in reverse order, in case
- EXTRA_CC_MODES was used and CC is a prefix of the
+ there are extra CC modes and CC is a prefix of the
CC modes (as it should be). */
for (i = (MAX_MACHINE_MODE) - 1; i >= 0; i--)
{
A BITSIZE, BYTESIZE, or COUNT argument must be a positive integer
constant.
+ A FORMAT argument must be one of the real_mode_format structures
+ declared in real.h, or else a literal 0.
+
+ This file defines only those modes which are of use on almost all
+ machines. Other modes can be defined in the target-specific
+ mode definition file, config/ARCH/ARCH-modes.def.
+
Order matters in this file in so far as statements which refer to
other modes must appear after the modes they refer to. However,
statements which do not refer to other modes may appear in any
declares MODE to be of class INT, BYTESIZE bytes wide in
storage, but with only BITSIZE significant bits.
- FLOAT_MODE (MODE, BYTESIZE);
- declares MODE to be of class FLOAT and BYTESIZE bytes wide.
+ FLOAT_MODE (MODE, BYTESIZE, FORMAT);
+ declares MODE to be of class FLOAT and BYTESIZE bytes wide,
+ using floating point format FORMAT.
All of the bits of its representation are significant.
- FRACTIONAL_FLOAT_MODE (MODE, BITSIZE, BYTESIZE);
+ FRACTIONAL_FLOAT_MODE (MODE, BITSIZE, BYTESIZE, FORMAT);
declares MODE to be of class FLOAT, BYTESIZE bytes wide in
- storage, but with only BITSIZE significant bits.
+ storage, but with only BITSIZE significant bits, using
+ floating point format FORMAT.
+
+ RESET_FLOAT_FORMAT (MODE, FORMAT);
+ changes the format of MODE, which must be class FLOAT,
+ to FORMAT. Use in an ARCH-modes.def to reset the format
+ of one of the float modes defined in this file.
PARTIAL_INT_MODE (MODE);
declares a mode of class PARTIAL_INT with the same size as
error if there is no 'F'. For INT modes, the names are
derived by prefixing a C to the name.
- BITS_PER_UNIT (COUNT);
- Sets the number of bits in a machine byte (least addressable
- unit). If this statement does not appear, the default is 8.
-
Note: If a mode is ever made which is more than 255 bytes wide,
machmode.h and genmodes.c will have to be changed to allocate
more space for the mode_size and mode_alignment arrays. */
/* Single bit mode used for booleans. */
FRACTIONAL_INT_MODE (BI, 1, 1);
-/* Basic integer modes. */
+/* Basic integer modes. We go up to TI in generic code (128 bits).
+ The name OI is reserved for a 256-bit type (needed by some back ends).
+ FIXME TI shouldn't be generically available either. */
INT_MODE (QI, 1);
INT_MODE (HI, 2);
INT_MODE (SI, 4);
INT_MODE (DI, 8);
INT_MODE (TI, 16);
-INT_MODE (OI, 32);
-
-/* Pointers on some machines use these types to distinguish them from
- ints. Useful if a pointer is 4 bytes but has some bits that are
- not significant, so it is really not quite as wide as an integer. */
-PARTIAL_INT_MODE (QI);
-PARTIAL_INT_MODE (HI);
-PARTIAL_INT_MODE (SI);
-PARTIAL_INT_MODE (DI);
-
-/* Basic floating point modes. */
-FLOAT_MODE (QF, 1); /* C4x single precision */
-FLOAT_MODE (HF, 2); /* C4x double precision */
-FLOAT_MODE (TQF, 3); /* MIL-STD-1750a */
-FLOAT_MODE (SF, 4);
-FLOAT_MODE (DF, 8);
-FLOAT_MODE (XF, 12); /* IEEE extended (80-bit) */
-FLOAT_MODE (TF, 16);
-
-/* Basic CC modes. */
+
+/* No partial integer modes are defined by default. */
+
+/* Basic floating point modes. SF and DF are the only modes provided
+ by default. The names QF, HF, XF, and TF are reserved for targets
+ that need 1-word, 2-word, 80-bit, or 128-bit float types respectively.
+
+ These are the IEEE mappings. They can be overridden with
+ RESET_FLOAT_FORMAT or at runtime (in OVERRIDE_OPTIONS). */
+
+FLOAT_MODE (SF, 4, ieee_single_format);
+FLOAT_MODE (DF, 8, ieee_double_format);
+
+/* Basic CC modes.
+ FIXME define this only for targets that need it. */
CC_MODE (CC);
/* Allow the target to specify additional modes of various kinds. */
#if HAVE_EXTRA_MODES
-# define CC(X) CC_MODE(X); /* backward compatibility, temporary */
# include EXTRA_MODES_FILE
-# undef CC
#endif
/* Complex modes. */
VECTOR_MODE (INT, DI, 4);
VECTOR_MODE (INT, DI, 8);
-VECTOR_MODE (INT, DI, 1); /* PPC uses this. Why not plain DI? */
+/* PPC uses this to distinguish between DImode passed in
+ float registers and DImode passed in vector registers.
+ It would be in rs6000-modes.def but it's referenced in
+ c-common.c. FIXME. */
+
+VECTOR_MODE (INT, DI, 1);
VECTOR_MODES (FLOAT, 4); /* V2HF */
VECTOR_MODES (FLOAT, 8); /* V4HF V2SF */
#include "flags.h"
#include "hard-reg-set.h"
#include "basic-block.h"
-
-/* How to print out a register name.
- We don't use PRINT_REG because some definitions of PRINT_REG
- don't work here. */
-#ifndef DEBUG_PRINT_REG
-#define DEBUG_PRINT_REG(RTX, CODE, FILE) \
- fprintf ((FILE), "%d %s", REGNO (RTX), reg_names[REGNO (RTX)])
-#endif
-
-/* Array containing all of the register names */
-
-#ifdef DEBUG_REGISTER_NAMES
-static const char * const debug_reg_names[] = DEBUG_REGISTER_NAMES;
-#define reg_names debug_reg_names
-#else
-const char * reg_names[] = REGISTER_NAMES;
-#endif
+#include "tm_p.h"
static FILE *outfile;
int value = XINT (in_rtx, i);
const char *name;
+#ifndef GENERATOR_FILE
if (GET_CODE (in_rtx) == REG && value < FIRST_PSEUDO_REGISTER)
{
fputc (' ', outfile);
- DEBUG_PRINT_REG (in_rtx, 0, outfile);
+ PRINT_REG (in_rtx, 0, outfile);
}
else if (GET_CODE (in_rtx) == REG
&& value <= LAST_VIRTUAL_REGISTER)
fprintf (outfile, " %d virtual-reg-%d", value,
value-FIRST_VIRTUAL_REGISTER);
}
- else if (flag_dump_unnumbered
+ else
+#endif
+ if (flag_dump_unnumbered
&& (is_insn || GET_CODE (in_rtx) == NOTE))
fputc ('#', outfile);
else
true,
true
};
-\f
-/* Set up default mode to format mapping for IEEE. Everyone else has
- to set these values in OVERRIDE_OPTIONS. */
-
-const struct real_format *real_format_for_mode[TFmode - QFmode + 1] =
-{
- NULL, /* QFmode */
- NULL, /* HFmode */
- NULL, /* TQFmode */
- &ieee_single_format, /* SFmode */
- &ieee_double_format, /* DFmode */
-
- /* We explicitly don't handle XFmode. There are two formats,
- pretty much equally common. Choose one in OVERRIDE_OPTIONS. */
- NULL, /* XFmode */
- &ieee_quad_format /* TFmode */
-};
-
\f
/* Calculate the square root of X in mode MODE, and store the result
in R. Return TRUE if the operation does not raise an exception.
enum reg_class reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES];
-/* Array containing all of the register names. Unless
- DEBUG_REGISTER_NAMES is defined, use the copy in print-rtl.c. */
+/* Array containing all of the register names. */
-#ifdef DEBUG_REGISTER_NAMES
const char * reg_names[] = REGISTER_NAMES;
-#endif
/* For each hard register, the widest mode object that it can contain.
This will be a MODE_INT mode if the register can hold integers. Otherwise
projects / thirdparty / gcc.git / commitdiff
