]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
ARM: dts: at91: sama7g5: add tcb nodes
authorClaudiu Beznea <claudiu.beznea@microchip.com>
Wed, 20 Oct 2021 09:46:55 +0000 (12:46 +0300)
committerNicolas Ferre <nicolas.ferre@microchip.com>
Thu, 21 Oct 2021 11:45:16 +0000 (13:45 +0200)
Add TCB nodes.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211020094656.3343242-3-claudiu.beznea@microchip.com
arch/arm/boot/dts/sama7g5.dtsi

index 0912219ed5a1610d092e518e65325052c632bd3e..c75c7d7c284227002cf37e3df29253f876ba32d9 100644 (file)
                        clocks = <&clk32k 0>;
                };
 
+               tcb1: timer@e0800000 {
+                       compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0xe0800000 0x100>;
+                       interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&pmc PMC_TYPE_PERIPHERAL 91>, <&pmc PMC_TYPE_PERIPHERAL 92>, <&pmc PMC_TYPE_PERIPHERAL 93>, <&clk32k 1>;
+                       clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
+               };
+
                adc: adc@e1000000 {
                        compatible = "microchip,sama7g5-adc";
                        reg = <0xe1000000 0x200>;
                        status = "disabled";
                };
 
+               tcb0: timer@e2814000 {
+                       compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0xe2814000 0x100>;
+                       interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&pmc PMC_TYPE_PERIPHERAL 88>, <&pmc PMC_TYPE_PERIPHERAL 89>, <&pmc PMC_TYPE_PERIPHERAL 90>, <&clk32k 1>;
+                       clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
+               };
+
                flx8: flexcom@e2818000 {
                        compatible = "atmel,sama5d2-flexcom";
                        reg = <0xe2818000 0x200>;