static void __stmmac_disable_all_queues(struct stmmac_priv *priv)
{
- u32 rx_queues_cnt = priv->plat->rx_queues_to_use;
- u32 tx_queues_cnt = priv->plat->tx_queues_to_use;
- u32 maxq = max(rx_queues_cnt, tx_queues_cnt);
- u32 queue;
+ u8 rx_queues_cnt = priv->plat->rx_queues_to_use;
+ u8 tx_queues_cnt = priv->plat->tx_queues_to_use;
+ u8 maxq = max(rx_queues_cnt, tx_queues_cnt);
+ u8 queue;
for (queue = 0; queue < maxq; queue++) {
struct stmmac_channel *ch = &priv->channel[queue];
*/
static void stmmac_disable_all_queues(struct stmmac_priv *priv)
{
- u32 rx_queues_cnt = priv->plat->rx_queues_to_use;
+ u8 rx_queues_cnt = priv->plat->rx_queues_to_use;
struct stmmac_rx_queue *rx_q;
- u32 queue;
+ u8 queue;
/* synchronize_rcu() needed for pending XDP buffers to drain */
for (queue = 0; queue < rx_queues_cnt; queue++) {
*/
static void stmmac_enable_all_queues(struct stmmac_priv *priv)
{
- u32 rx_queues_cnt = priv->plat->rx_queues_to_use;
- u32 tx_queues_cnt = priv->plat->tx_queues_to_use;
- u32 maxq = max(rx_queues_cnt, tx_queues_cnt);
- u32 queue;
+ u8 rx_queues_cnt = priv->plat->rx_queues_to_use;
+ u8 tx_queues_cnt = priv->plat->tx_queues_to_use;
+ u8 maxq = max(rx_queues_cnt, tx_queues_cnt);
+ u8 queue;
for (queue = 0; queue < maxq; queue++) {
struct stmmac_channel *ch = &priv->channel[queue];
static bool stmmac_eee_tx_busy(struct stmmac_priv *priv)
{
- u32 tx_cnt = priv->plat->tx_queues_to_use;
- u32 queue;
+ u8 tx_cnt = priv->plat->tx_queues_to_use;
+ u8 queue;
/* check if all TX queues have the work finished */
for (queue = 0; queue < tx_cnt; queue++) {
static void stmmac_mac_flow_ctrl(struct stmmac_priv *priv, u32 duplex,
unsigned int flow_ctrl)
{
- u32 tx_cnt = priv->plat->tx_queues_to_use;
+ u8 tx_cnt = priv->plat->tx_queues_to_use;
stmmac_flow_ctrl(priv, priv->hw, duplex, flow_ctrl, priv->pause_time,
tx_cnt);
static void stmmac_display_rx_rings(struct stmmac_priv *priv,
struct stmmac_dma_conf *dma_conf)
{
- u32 rx_cnt = priv->plat->rx_queues_to_use;
+ u8 rx_cnt = priv->plat->rx_queues_to_use;
unsigned int desc_size;
void *head_rx;
- u32 queue;
+ u8 queue;
/* Display RX rings */
for (queue = 0; queue < rx_cnt; queue++) {
static void stmmac_display_tx_rings(struct stmmac_priv *priv,
struct stmmac_dma_conf *dma_conf)
{
- u32 tx_cnt = priv->plat->tx_queues_to_use;
+ u8 tx_cnt = priv->plat->tx_queues_to_use;
unsigned int desc_size;
void *head_tx;
- u32 queue;
+ u8 queue;
/* Display TX rings */
for (queue = 0; queue < tx_cnt; queue++) {
static void stmmac_clear_descriptors(struct stmmac_priv *priv,
struct stmmac_dma_conf *dma_conf)
{
- u32 rx_queue_cnt = priv->plat->rx_queues_to_use;
- u32 tx_queue_cnt = priv->plat->tx_queues_to_use;
- u32 queue;
+ u8 rx_queue_cnt = priv->plat->rx_queues_to_use;
+ u8 tx_queue_cnt = priv->plat->tx_queues_to_use;
+ u8 queue;
/* Clear the RX descriptors */
for (queue = 0; queue < rx_queue_cnt; queue++)
gfp_t flags)
{
struct stmmac_priv *priv = netdev_priv(dev);
- u32 rx_count = priv->plat->rx_queues_to_use;
+ u8 rx_count = priv->plat->rx_queues_to_use;
int queue;
int ret;
struct stmmac_dma_conf *dma_conf)
{
struct stmmac_priv *priv = netdev_priv(dev);
- u32 tx_queue_cnt;
- u32 queue;
+ u8 tx_queue_cnt;
+ u8 queue;
tx_queue_cnt = priv->plat->tx_queues_to_use;
*/
static void stmmac_free_tx_skbufs(struct stmmac_priv *priv)
{
- u32 tx_queue_cnt = priv->plat->tx_queues_to_use;
- u32 queue;
+ u8 tx_queue_cnt = priv->plat->tx_queues_to_use;
+ u8 queue;
for (queue = 0; queue < tx_queue_cnt; queue++)
dma_free_tx_skbufs(priv, &priv->dma_conf, queue);
static void free_dma_rx_desc_resources(struct stmmac_priv *priv,
struct stmmac_dma_conf *dma_conf)
{
- u32 rx_count = priv->plat->rx_queues_to_use;
- u32 queue;
+ u8 rx_count = priv->plat->rx_queues_to_use;
+ u8 queue;
/* Free RX queue resources */
for (queue = 0; queue < rx_count; queue++)
static void free_dma_tx_desc_resources(struct stmmac_priv *priv,
struct stmmac_dma_conf *dma_conf)
{
- u32 tx_count = priv->plat->tx_queues_to_use;
- u32 queue;
+ u8 tx_count = priv->plat->tx_queues_to_use;
+ u8 queue;
/* Free TX queue resources */
for (queue = 0; queue < tx_count; queue++)
static int alloc_dma_rx_desc_resources(struct stmmac_priv *priv,
struct stmmac_dma_conf *dma_conf)
{
- u32 rx_count = priv->plat->rx_queues_to_use;
- u32 queue;
+ u8 rx_count = priv->plat->rx_queues_to_use;
+ u8 queue;
int ret;
/* RX queues buffers and DMA */
static int alloc_dma_tx_desc_resources(struct stmmac_priv *priv,
struct stmmac_dma_conf *dma_conf)
{
- u32 tx_count = priv->plat->tx_queues_to_use;
- u32 queue;
+ u8 tx_count = priv->plat->tx_queues_to_use;
+ u8 queue;
int ret;
/* TX queues buffers and DMA */
*/
static void stmmac_mac_enable_rx_queues(struct stmmac_priv *priv)
{
- u32 rx_queues_count = priv->plat->rx_queues_to_use;
- int queue;
+ u8 rx_queues_count = priv->plat->rx_queues_to_use;
+ u8 queue;
u8 mode;
for (queue = 0; queue < rx_queues_count; queue++) {
static void stmmac_enable_all_dma_irq(struct stmmac_priv *priv)
{
- u32 rx_channels_count = priv->plat->rx_queues_to_use;
- u32 tx_channels_count = priv->plat->tx_queues_to_use;
- u32 dma_csr_ch = max(rx_channels_count, tx_channels_count);
- u32 chan;
+ u8 rx_channels_count = priv->plat->rx_queues_to_use;
+ u8 tx_channels_count = priv->plat->tx_queues_to_use;
+ u8 dma_csr_ch = max(rx_channels_count, tx_channels_count);
+ u8 chan;
for (chan = 0; chan < dma_csr_ch; chan++) {
struct stmmac_channel *ch = &priv->channel[chan];
*/
static void stmmac_start_all_dma(struct stmmac_priv *priv)
{
- u32 rx_channels_count = priv->plat->rx_queues_to_use;
- u32 tx_channels_count = priv->plat->tx_queues_to_use;
- u32 chan = 0;
+ u8 rx_channels_count = priv->plat->rx_queues_to_use;
+ u8 tx_channels_count = priv->plat->tx_queues_to_use;
+ u8 chan;
for (chan = 0; chan < rx_channels_count; chan++)
stmmac_start_rx_dma(priv, chan);
*/
static void stmmac_stop_all_dma(struct stmmac_priv *priv)
{
- u32 rx_channels_count = priv->plat->rx_queues_to_use;
- u32 tx_channels_count = priv->plat->tx_queues_to_use;
- u32 chan = 0;
+ u8 rx_channels_count = priv->plat->rx_queues_to_use;
+ u8 tx_channels_count = priv->plat->tx_queues_to_use;
+ u8 chan;
for (chan = 0; chan < rx_channels_count; chan++)
stmmac_stop_rx_dma(priv, chan);
*/
static void stmmac_dma_operation_mode(struct stmmac_priv *priv)
{
- u32 rx_channels_count = priv->plat->rx_queues_to_use;
- u32 tx_channels_count = priv->plat->tx_queues_to_use;
+ u8 rx_channels_count = priv->plat->rx_queues_to_use;
+ u8 tx_channels_count = priv->plat->tx_queues_to_use;
int rxfifosz = priv->plat->rx_fifo_size;
int txfifosz = priv->plat->tx_fifo_size;
u32 txmode = 0;
u32 rxmode = 0;
- u32 chan = 0;
u8 qmode = 0;
+ u8 chan;
if (rxfifosz == 0)
rxfifosz = priv->dma_cap.rx_fifo_size;
{
u8 rxqmode = priv->plat->rx_queues_cfg[chan].mode_to_use;
u8 txqmode = priv->plat->tx_queues_cfg[chan].mode_to_use;
- u32 rx_channels_count = priv->plat->rx_queues_to_use;
- u32 tx_channels_count = priv->plat->tx_queues_to_use;
+ u8 rx_channels_count = priv->plat->rx_queues_to_use;
+ u8 tx_channels_count = priv->plat->tx_queues_to_use;
int rxfifosz = priv->plat->rx_fifo_size;
int txfifosz = priv->plat->tx_fifo_size;
*/
static void stmmac_dma_interrupt(struct stmmac_priv *priv)
{
- u32 tx_channel_count = priv->plat->tx_queues_to_use;
- u32 rx_channel_count = priv->plat->rx_queues_to_use;
- u32 channels_to_check = tx_channel_count > rx_channel_count ?
- tx_channel_count : rx_channel_count;
- u32 chan;
+ u8 tx_channel_count = priv->plat->tx_queues_to_use;
+ u8 rx_channel_count = priv->plat->rx_queues_to_use;
+ u8 channels_to_check = tx_channel_count > rx_channel_count ?
+ tx_channel_count : rx_channel_count;
int status[MAX_T(u32, MTL_MAX_TX_QUEUES, MTL_MAX_RX_QUEUES)];
+ u8 chan;
/* Make sure we never check beyond our status buffer. */
if (WARN_ON_ONCE(channels_to_check > ARRAY_SIZE(status)))
*/
static int stmmac_init_dma_engine(struct stmmac_priv *priv)
{
- u32 rx_channels_count = priv->plat->rx_queues_to_use;
- u32 tx_channels_count = priv->plat->tx_queues_to_use;
- u32 dma_csr_ch = max(rx_channels_count, tx_channels_count);
+ u8 rx_channels_count = priv->plat->rx_queues_to_use;
+ u8 tx_channels_count = priv->plat->tx_queues_to_use;
+ u8 dma_csr_ch = max(rx_channels_count, tx_channels_count);
struct stmmac_rx_queue *rx_q;
struct stmmac_tx_queue *tx_q;
- u32 chan = 0;
int ret = 0;
+ u8 chan;
ret = stmmac_prereset_configure(priv);
if (ret)
*/
static void stmmac_init_coalesce(struct stmmac_priv *priv)
{
- u32 tx_channel_count = priv->plat->tx_queues_to_use;
- u32 rx_channel_count = priv->plat->rx_queues_to_use;
- u32 chan;
+ u8 tx_channel_count = priv->plat->tx_queues_to_use;
+ u8 rx_channel_count = priv->plat->rx_queues_to_use;
+ u8 chan;
for (chan = 0; chan < tx_channel_count; chan++) {
struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[chan];
static void stmmac_set_rings_length(struct stmmac_priv *priv)
{
- u32 rx_channels_count = priv->plat->rx_queues_to_use;
- u32 tx_channels_count = priv->plat->tx_queues_to_use;
- u32 chan;
+ u8 rx_channels_count = priv->plat->rx_queues_to_use;
+ u8 tx_channels_count = priv->plat->tx_queues_to_use;
+ u8 chan;
/* set TX ring length */
for (chan = 0; chan < tx_channels_count; chan++)
*/
static void stmmac_set_tx_queue_weight(struct stmmac_priv *priv)
{
- u32 tx_queues_count = priv->plat->tx_queues_to_use;
+ u8 tx_queues_count = priv->plat->tx_queues_to_use;
u32 weight;
- u32 queue;
+ u8 queue;
for (queue = 0; queue < tx_queues_count; queue++) {
weight = priv->plat->tx_queues_cfg[queue].weight;
*/
static void stmmac_configure_cbs(struct stmmac_priv *priv)
{
- u32 tx_queues_count = priv->plat->tx_queues_to_use;
+ u8 tx_queues_count = priv->plat->tx_queues_to_use;
u32 mode_to_use;
- u32 queue;
+ u8 queue;
/* queue 0 is reserved for legacy traffic */
for (queue = 1; queue < tx_queues_count; queue++) {
*/
static void stmmac_rx_queue_dma_chan_map(struct stmmac_priv *priv)
{
- u32 rx_queues_count = priv->plat->rx_queues_to_use;
- u32 queue;
+ u8 rx_queues_count = priv->plat->rx_queues_to_use;
+ u8 queue;
u32 chan;
for (queue = 0; queue < rx_queues_count; queue++) {
*/
static void stmmac_mac_config_rx_queues_prio(struct stmmac_priv *priv)
{
- u32 rx_queues_count = priv->plat->rx_queues_to_use;
- u32 queue;
+ u8 rx_queues_count = priv->plat->rx_queues_to_use;
+ u8 queue;
u32 prio;
for (queue = 0; queue < rx_queues_count; queue++) {
*/
static void stmmac_mac_config_tx_queues_prio(struct stmmac_priv *priv)
{
- u32 tx_queues_count = priv->plat->tx_queues_to_use;
- u32 queue;
+ u8 tx_queues_count = priv->plat->tx_queues_to_use;
+ u8 queue;
u32 prio;
for (queue = 0; queue < tx_queues_count; queue++) {
*/
static void stmmac_mac_config_rx_queues_routing(struct stmmac_priv *priv)
{
- u32 rx_queues_count = priv->plat->rx_queues_to_use;
- u32 queue;
+ u8 rx_queues_count = priv->plat->rx_queues_to_use;
u8 packet;
+ u8 queue;
for (queue = 0; queue < rx_queues_count; queue++) {
/* no specific packet type routing specified for the queue */
*/
static void stmmac_mtl_configuration(struct stmmac_priv *priv)
{
- u32 rx_queues_count = priv->plat->rx_queues_to_use;
- u32 tx_queues_count = priv->plat->tx_queues_to_use;
+ u8 rx_queues_count = priv->plat->rx_queues_to_use;
+ u8 tx_queues_count = priv->plat->tx_queues_to_use;
if (tx_queues_count > 1)
stmmac_set_tx_queue_weight(priv);
static int stmmac_hw_setup(struct net_device *dev)
{
struct stmmac_priv *priv = netdev_priv(dev);
- u32 rx_cnt = priv->plat->rx_queues_to_use;
- u32 tx_cnt = priv->plat->tx_queues_to_use;
+ u8 rx_cnt = priv->plat->rx_queues_to_use;
+ u8 tx_cnt = priv->plat->tx_queues_to_use;
bool sph_en;
- u32 chan;
+ u8 chan;
int ret;
/* Make sure RX clock is enabled */
stmmac_setup_dma_desc(struct stmmac_priv *priv, unsigned int mtu)
{
struct stmmac_dma_conf *dma_conf;
- int chan, bfsize, ret;
+ int bfsize, ret;
+ u8 chan;
dma_conf = kzalloc_obj(*dma_conf);
if (!dma_conf) {
struct stmmac_dma_conf *dma_conf)
{
struct stmmac_priv *priv = netdev_priv(dev);
- u32 chan;
+ u8 chan;
int ret;
for (int i = 0; i < MTL_MAX_TX_QUEUES; i++)
static void __stmmac_release(struct net_device *dev)
{
struct stmmac_priv *priv = netdev_priv(dev);
- u32 chan;
+ u8 chan;
/* Stop and disconnect the PHY */
phylink_stop(priv->phylink);
if (priv->sph_capable) {
bool sph_en = (priv->hw->rx_csum > 0) && priv->sph_active;
- u32 chan;
+ u8 chan;
for (chan = 0; chan < priv->plat->rx_queues_to_use; chan++)
stmmac_enable_sph(priv, priv->ioaddr, sph_en, chan);
static void stmmac_common_interrupt(struct stmmac_priv *priv)
{
- u32 rx_cnt = priv->plat->rx_queues_to_use;
- u32 tx_cnt = priv->plat->tx_queues_to_use;
- u32 queues_count;
- u32 queue;
+ u8 rx_cnt = priv->plat->rx_queues_to_use;
+ u8 tx_cnt = priv->plat->tx_queues_to_use;
+ u8 queues_count;
bool xmac;
+ u8 queue;
xmac = dwmac_is_xmac(priv->plat->core_type);
queues_count = (rx_cnt > tx_cnt) ? rx_cnt : tx_cnt;
{
struct net_device *dev = seq->private;
struct stmmac_priv *priv = netdev_priv(dev);
- u32 rx_count = priv->plat->rx_queues_to_use;
- u32 tx_count = priv->plat->tx_queues_to_use;
- u32 queue;
+ u8 rx_count = priv->plat->rx_queues_to_use;
+ u8 tx_count = priv->plat->tx_queues_to_use;
+ u8 queue;
if ((dev->flags & IFF_UP) == 0)
return 0;
priv->dma_cap.number_rx_channel);
seq_printf(seq, "\tNumber of Additional TX channel: %d\n",
priv->dma_cap.number_tx_channel);
- seq_printf(seq, "\tNumber of Additional RX queues: %d\n",
+ seq_printf(seq, "\tNumber of Additional RX queues: %u\n",
priv->dma_cap.number_rx_queues);
- seq_printf(seq, "\tNumber of Additional TX queues: %d\n",
+ seq_printf(seq, "\tNumber of Additional TX queues: %u\n",
priv->dma_cap.number_tx_queues);
seq_printf(seq, "\tEnhanced descriptors: %s\n",
(priv->dma_cap.enh_desc) ? "Y" : "N");
void stmmac_xdp_release(struct net_device *dev)
{
struct stmmac_priv *priv = netdev_priv(dev);
- u32 chan;
+ u8 chan;
/* Ensure tx function is not running */
netif_tx_disable(dev);
int stmmac_xdp_open(struct net_device *dev)
{
struct stmmac_priv *priv = netdev_priv(dev);
- u32 rx_cnt = priv->plat->rx_queues_to_use;
- u32 tx_cnt = priv->plat->tx_queues_to_use;
- u32 dma_csr_ch = max(rx_cnt, tx_cnt);
+ u8 rx_cnt = priv->plat->rx_queues_to_use;
+ u8 tx_cnt = priv->plat->tx_queues_to_use;
+ u8 dma_csr_ch = max(rx_cnt, tx_cnt);
struct stmmac_rx_queue *rx_q;
struct stmmac_tx_queue *tx_q;
u32 buf_size;
bool sph_en;
- u32 chan;
+ u8 chan;
int ret;
ret = alloc_dma_desc_resources(priv, &priv->dma_conf);
static void stmmac_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats)
{
struct stmmac_priv *priv = netdev_priv(dev);
- u32 tx_cnt = priv->plat->tx_queues_to_use;
- u32 rx_cnt = priv->plat->rx_queues_to_use;
+ u8 tx_cnt = priv->plat->tx_queues_to_use;
+ u8 rx_cnt = priv->plat->rx_queues_to_use;
unsigned int start;
- int q;
+ u8 q;
for (q = 0; q < tx_cnt; q++) {
struct stmmac_txq_stats *txq_stats = &priv->xstats.txq_stats[q];
static void stmmac_napi_add(struct net_device *dev)
{
struct stmmac_priv *priv = netdev_priv(dev);
- u32 queue, maxq;
+ u8 queue, maxq;
maxq = max(priv->plat->rx_queues_to_use, priv->plat->tx_queues_to_use);
static void stmmac_napi_del(struct net_device *dev)
{
struct stmmac_priv *priv = netdev_priv(dev);
- u32 queue, maxq;
+ u8 queue, maxq;
maxq = max(priv->plat->rx_queues_to_use, priv->plat->tx_queues_to_use);
}
}
-int stmmac_reinit_queues(struct net_device *dev, u32 rx_cnt, u32 tx_cnt)
+int stmmac_reinit_queues(struct net_device *dev, u8 rx_cnt, u8 tx_cnt)
{
struct stmmac_priv *priv = netdev_priv(dev);
int ret = 0, i;
{
struct net_device *ndev = NULL;
struct stmmac_priv *priv;
- u32 rxq;
int i, ret = 0;
+ u8 rxq;
if (!plat_dat->dma_cfg || !plat_dat->dma_cfg->pbl) {
dev_err(device, "invalid DMA configuration\n");
{
struct net_device *ndev = dev_get_drvdata(dev);
struct stmmac_priv *priv = netdev_priv(ndev);
- u32 chan;
+ u8 chan;
if (!ndev || !netif_running(ndev))
goto suspend_bsp;
*/
static void stmmac_reset_queues_param(struct stmmac_priv *priv)
{
- u32 rx_cnt = priv->plat->rx_queues_to_use;
- u32 tx_cnt = priv->plat->tx_queues_to_use;
- u32 queue;
+ u8 rx_cnt = priv->plat->rx_queues_to_use;
+ u8 tx_cnt = priv->plat->tx_queues_to_use;
+ u8 queue;
for (queue = 0; queue < rx_cnt; queue++)
stmmac_reset_rx_queue(priv, queue);