drm: lcdif: Use adjusted_mode .clock instead of .crtc_clock

In case an upstream bridge modified the required clock frequency
in its .atomic_check callback by setting adjusted_mode.clock ,
make sure that clock frequency is generated by the LCDIFv3 block.

This is useful e.g. when LCDIFv3 feeds DSIM which feeds TC358767
with (e)DP output, where the TC358767 expects precise timing on
its input side, the precise timing must be generated by the LCDIF.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240531202813.277109-1-marex@denx.de

diff --git a/drivers/gpu/drm/mxsfb/lcdif_kms.c b/drivers/gpu/drm/mxsfb/lcdif_kms.c
index 2541d2de4e45f8c4d32a25a2e0c62efb473078d6..dbd42cc1da87f82ef9cd4ccc70cdecbe56035174 100644 (file)
--- a/drivers/gpu/drm/mxsfb/lcdif_kms.c
+++ b/drivers/gpu/drm/mxsfb/lcdif_kms.c
@@ -407,8 +407,7 @@ static void lcdif_crtc_mode_set_nofb(struct drm_crtc_state *crtc_state,
        struct drm_display_mode *m = &crtc_state->adjusted_mode;
 
        DRM_DEV_DEBUG_DRIVER(drm->dev, "Pixel clock: %dkHz (actual: %dkHz)\n",
-                            m->crtc_clock,
-                            (int)(clk_get_rate(lcdif->clk) / 1000));
+                            m->clock, (int)(clk_get_rate(lcdif->clk) / 1000));
        DRM_DEV_DEBUG_DRIVER(drm->dev, "Bridge bus_flags: 0x%08X\n",
                             lcdif_crtc_state->bus_flags);
        DRM_DEV_DEBUG_DRIVER(drm->dev, "Mode flags: 0x%08X\n", m->flags);
@@ -538,7 +537,7 @@ static void lcdif_crtc_atomic_enable(struct drm_crtc *crtc,
        struct drm_device *drm = lcdif->drm;
        dma_addr_t paddr;
 
-       clk_set_rate(lcdif->clk, m->crtc_clock * 1000);
+       clk_set_rate(lcdif->clk, m->clock * 1000);
 
        pm_runtime_get_sync(drm->dev);