net: dwmac-imx: add imx93 clock input support in RMII mode

If the rmii_refclk_ext boolean is set, configure the ENET QOS TX_CLK pin
direction to input. Otherwise, it defaults to output.

That mirrors what is already happening for the imx8mp in the
imx8mp_set_intf_mode function.

Signed-off-by: Mathieu Othacehe <othacehe@gnu.org>
Link: https://patch.msgid.link/20241227095923.4414-1-othacehe@gnu.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c
index 43e0fbba4f77b709e2c8ea49d2679d31dec92afe..4ac7a78f4b14b95169787538b56dad7f7fe162d3 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c
@@ -36,6 +36,8 @@
 #define MX93_GPR_ENET_QOS_INTF_SEL_RMII                (0x4 << 1)
 #define MX93_GPR_ENET_QOS_INTF_SEL_RGMII       (0x1 << 1)
 #define MX93_GPR_ENET_QOS_CLK_GEN_EN           (0x1 << 0)
+#define MX93_GPR_ENET_QOS_CLK_SEL_MASK         BIT_MASK(0)
+#define MX93_GPR_CLK_SEL_OFFSET                        (4)
 
 #define DMA_BUS_MODE                   0x00001000
 #define DMA_BUS_MODE_SFT_RESET         (0x1 << 0)
@@ -108,13 +110,21 @@ imx8dxl_set_intf_mode(struct plat_stmmacenet_data *plat_dat)
 static int imx93_set_intf_mode(struct plat_stmmacenet_data *plat_dat)
 {
        struct imx_priv_data *dwmac = plat_dat->bsp_priv;
-       int val;
+       int val, ret;
 
        switch (plat_dat->mac_interface) {
        case PHY_INTERFACE_MODE_MII:
                val = MX93_GPR_ENET_QOS_INTF_SEL_MII;
                break;
        case PHY_INTERFACE_MODE_RMII:
+               if (dwmac->rmii_refclk_ext) {
+                       ret = regmap_clear_bits(dwmac->intf_regmap,
+                                               dwmac->intf_reg_off +
+                                               MX93_GPR_CLK_SEL_OFFSET,
+                                               MX93_GPR_ENET_QOS_CLK_SEL_MASK);
+                       if (ret)
+                               return ret;
+               }
                val = MX93_GPR_ENET_QOS_INTF_SEL_RMII;
                break;
        case PHY_INTERFACE_MODE_RGMII: