]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
dt-bindings: power: qcom,rpmhpd: Add RPMh power domain for Hawi SoC
authorFenglin Wu <fenglin.wu@oss.qualcomm.com>
Fri, 3 Apr 2026 00:35:21 +0000 (17:35 -0700)
committerUlf Hansson <ulf.hansson@linaro.org>
Wed, 8 Apr 2026 09:55:01 +0000 (11:55 +0200)
Document the RPMh power domain for Hawi SoC, and add definitions for
the new power domains which present in Hawi SoC:
 - RPMHPD_DCX (Display Core X): supplies VDD_DISP for the display
   subsystem
 - RPMHPD_GBX (Graphics Box): supplies VDD_GFX_BX for the GPU/graphics
   subsystem

Also, add constants for new power domain levels that supported in Hawi
SoC, including: LOW_SVS_D3_0, LOW_SVS_D1_0, LOW_SVS_D0_0, SVS_L2_0,
TURBO_L1_0/1/2, TURBO_L1_0/1/2.

Signed-off-by: Fenglin Wu <fenglin.wu@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Documentation/devicetree/bindings/power/qcom,rpmpd.yaml
include/dt-bindings/power/qcom,rpmhpd.h

index 8174ceeab57235dd72ca0b0173ac33c9f2884d72..0bf1e13a99646c0325b03fc5b3297ebada21cdb6 100644 (file)
@@ -19,6 +19,7 @@ properties:
       - enum:
           - qcom,eliza-rpmhpd
           - qcom,glymur-rpmhpd
+          - qcom,hawi-rpmhpd
           - qcom,kaanapali-rpmhpd
           - qcom,mdm9607-rpmpd
           - qcom,milos-rpmhpd
index 06851363ae0eaff279deb9cd61c1b619b55292be..67e2634fdc9924cffc8a8842c69d5034c09b1670 100644 (file)
 #define RPMHPD_XO               18
 #define RPMHPD_NSP2             19
 #define RPMHPD_GMXC            20
+#define RPMHPD_DCX             21
+#define RPMHPD_GBX             22
 
 /* RPMh Power Domain performance levels */
 #define RPMH_REGULATOR_LEVEL_RETENTION         16
 #define RPMH_REGULATOR_LEVEL_MIN_SVS           48
+#define RPMH_REGULATOR_LEVEL_LOW_SVS_D3_0      49
 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D3                50
 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D2_1      51
 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D2                52
 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D1_1      54
+#define RPMH_REGULATOR_LEVEL_LOW_SVS_D1_0      55
 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D1                56
+#define RPMH_REGULATOR_LEVEL_LOW_SVS_D0_0      59
 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D0                60
 #define RPMH_REGULATOR_LEVEL_LOW_SVS           64
 #define RPMH_REGULATOR_LEVEL_LOW_SVS_P1                72
@@ -47,6 +52,7 @@
 #define RPMH_REGULATOR_LEVEL_SVS_L0            144
 #define RPMH_REGULATOR_LEVEL_SVS_L1            192
 #define RPMH_REGULATOR_LEVEL_SVS_L2            224
+#define RPMH_REGULATOR_LEVEL_SVS_L2_0          225
 #define RPMH_REGULATOR_LEVEL_NOM               256
 #define RPMH_REGULATOR_LEVEL_NOM_L0            288
 #define RPMH_REGULATOR_LEVEL_NOM_L1            320
 #define RPMH_REGULATOR_LEVEL_TURBO             384
 #define RPMH_REGULATOR_LEVEL_TURBO_L0          400
 #define RPMH_REGULATOR_LEVEL_TURBO_L1          416
+#define RPMH_REGULATOR_LEVEL_TURBO_L1_0                417
+#define RPMH_REGULATOR_LEVEL_TURBO_L1_1                418
+#define RPMH_REGULATOR_LEVEL_TURBO_L1_2                419
 #define RPMH_REGULATOR_LEVEL_TURBO_L2          432
 #define RPMH_REGULATOR_LEVEL_TURBO_L3          448
+#define RPMH_REGULATOR_LEVEL_TURBO_L3_0                449
+#define RPMH_REGULATOR_LEVEL_TURBO_L3_1                450
+#define RPMH_REGULATOR_LEVEL_TURBO_L3_2                451
 #define RPMH_REGULATOR_LEVEL_TURBO_L4          452
 #define RPMH_REGULATOR_LEVEL_TURBO_L5          456
 #define RPMH_REGULATOR_LEVEL_SUPER_TURBO       464