arm64: dts: broadcom: bcmbca: bcm4908: Protect cpu-release-addr

The `cpu-release-addr` property is relevant only when the "spin-table"
enable method is used. It is the physical address where the bootloader
expects Linux to write the secondary CPU entry point's physical address.
On this platform, only the CFE bootloader uses this method: U-Boot uses
PSCI instead.

CFE actually walks the FDT to learn this address, so we're free to put
it wherever we want. We only need to make sure that it goes in a
reserved-memory block so that writing to it during early boot does not
risk conflicting with an unrelated memory allocation: this was not done.

Since the previous patch reserved the first page of memory for CFE's
secondary-CPU init stub, which is actually much smaller than a page,
just put this address at the end of that page and it shall be so
protected.

Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Link: https://lore.kernel.org/r/20241005050155.61103-3-CFSworks@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>

diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
index c51b92387fad82cee15803d7b5d7f1759ea7a179..613ba7ee43d6489ea0f1490d2fccaf90961b2694 100644 (file)
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
@@ -30,7 +30,7 @@
                        compatible = "brcm,brahma-b53";
                        reg = <0x0>;
                        enable-method = "spin-table";
-                       cpu-release-addr = <0x0 0xfff8>;
+                       cpu-release-addr = <0x0 0xff8>;
                        next-level-cache = <&l2>;
                };
 
@@ -39,7 +39,7 @@
                        compatible = "brcm,brahma-b53";
                        reg = <0x1>;
                        enable-method = "spin-table";
-                       cpu-release-addr = <0x0 0xfff8>;
+                       cpu-release-addr = <0x0 0xff8>;
                        next-level-cache = <&l2>;
                };
 
@@ -48,7 +48,7 @@
                        compatible = "brcm,brahma-b53";
                        reg = <0x2>;
                        enable-method = "spin-table";
-                       cpu-release-addr = <0x0 0xfff8>;
+                       cpu-release-addr = <0x0 0xff8>;
                        next-level-cache = <&l2>;
                };
 
@@ -57,7 +57,7 @@
                        compatible = "brcm,brahma-b53";
                        reg = <0x3>;
                        enable-method = "spin-table";
-                       cpu-release-addr = <0x0 0xfff8>;
+                       cpu-release-addr = <0x0 0xff8>;
                        next-level-cache = <&l2>;
                };